bus: ixp4xx: fix IXP4XX_EXP_T1_MASK
authorJonas Gorski <jonas.gorski@gmail.com>
Sat, 24 Jun 2023 12:21:39 +0000 (14:21 +0200)
committerArnd Bergmann <arnd@arndb.de>
Wed, 5 Jul 2023 20:22:55 +0000 (22:22 +0200)
The IXP4XX_EXP_T1_MASK was shifted one bit to the right, overlapping
IXP4XX_EXP_T2_MASK and leaving bit 29 unused. The offset being wrong is
also confirmed at least by the datasheet of IXP45X/46X [1].

Fix this by aligning it to IXP4XX_EXP_T1_SHIFT.

[1] https://www.intel.com/content/dam/www/public/us/en/documents/manuals/ixp45x-ixp46x-developers-manual.pdf

Cc: stable@vger.kernel.org
Fixes: 1c953bda90ca ("bus: ixp4xx: Add a driver for IXP4xx expansion bus")
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Link: https://lore.kernel.org/r/20230624112958.27727-1-jonas.gorski@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230624122139.3229642-1-linus.walleij@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
drivers/bus/intel-ixp4xx-eb.c

index f5ba6be..320cf30 100644 (file)
@@ -33,7 +33,7 @@
 #define IXP4XX_EXP_TIMING_STRIDE       0x04
 #define IXP4XX_EXP_CS_EN               BIT(31)
 #define IXP456_EXP_PAR_EN              BIT(30) /* Only on IXP45x and IXP46x */
-#define IXP4XX_EXP_T1_MASK             GENMASK(28, 27)
+#define IXP4XX_EXP_T1_MASK             GENMASK(29, 28)
 #define IXP4XX_EXP_T1_SHIFT            28
 #define IXP4XX_EXP_T2_MASK             GENMASK(27, 26)
 #define IXP4XX_EXP_T2_SHIFT            26