#include <asm/virt.h>
.text
-.pushsection .idmap.text, "awx"
+.pushsection .idmap.text, "a"
/*
* cpu_soft_restart(el2_switch, entry, arg0, arg1, arg2)
#ifdef CONFIG_ARM64_PTR_AUTH
static const struct arm64_cpu_capabilities ptr_auth_hwcap_addr_matches[] = {
{
- ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, APA, PAuth)
+ HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, APA, PAuth)
},
{
- ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, APA3, PAuth)
+ HWCAP_CPUID_MATCH(ID_AA64ISAR2_EL1, APA3, PAuth)
},
{
- ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, API, PAuth)
+ HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, API, PAuth)
},
{},
};
static const struct arm64_cpu_capabilities ptr_auth_hwcap_gen_matches[] = {
{
- ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, GPA, IMP)
+ HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, GPA, IMP)
},
{
- ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, GPA3, IMP)
+ HWCAP_CPUID_MATCH(ID_AA64ISAR2_EL1, GPA3, IMP)
},
{
- ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, GPI, IMP)
+ HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, GPI, IMP)
},
{},
};
pre_disable_mmu_workaround
msr sctlr_el2, x19
b 3f
- pre_disable_mmu_workaround
-2: msr sctlr_el1, x19
+2: pre_disable_mmu_workaround
+ msr sctlr_el1, x19
3: isb
mov x19, xzr
ret
ret
SYM_FUNC_END(__cpu_suspend_enter)
- .pushsection ".idmap.text", "awx"
+ .pushsection ".idmap.text", "a"
SYM_CODE_START(cpu_resume)
mov x0, xzr
bl init_kernel_el
KPROBES_TEXT
HYPERVISOR_TEXT
*(.gnu.warning)
- . = ALIGN(16);
- *(.got) /* Global offset table */
}
- /*
- * Make sure that the .got.plt is either completely empty or it
- * contains only the lazy dispatch entries.
- */
- .got.plt : { *(.got.plt) }
- ASSERT(SIZEOF(.got.plt) == 0 || SIZEOF(.got.plt) == 0x18,
- "Unexpected GOT/PLT entries detected!")
-
. = ALIGN(SEGMENT_ALIGN);
_etext = .; /* End of text section */
HYPERVISOR_DATA_SECTIONS
+ .got : { *(.got) }
+ /*
+ * Make sure that the .got.plt is either completely empty or it
+ * contains only the lazy dispatch entries.
+ */
+ .got.plt : { *(.got.plt) }
+ ASSERT(SIZEOF(.got.plt) == 0 || SIZEOF(.got.plt) == 0x18,
+ "Unexpected GOT/PLT entries detected!")
+
/* code sections that are never executed via the kernel mapping */
.rodata.text : {
TRAMP_TEXT
SYM_FUNC_END(cpu_do_resume)
#endif
- .pushsection ".idmap.text", "awx"
+ .pushsection ".idmap.text", "a"
.macro __idmap_cpu_set_reserved_ttbr1, tmp1, tmp2
adrp \tmp1, reserved_pg_dir
#define KPTI_NG_PTE_FLAGS (PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS)
- .pushsection ".idmap.text", "awx"
+ .pushsection ".idmap.text", "a"
.macro kpti_mk_tbl_ng, type, num_entries
add end_\type\()p, cur_\type\()p, #\num_entries * 8
* Output:
* Return in x0 the value of the SCTLR_EL1 register.
*/
- .pushsection ".idmap.text", "awx"
+ .pushsection ".idmap.text", "a"
SYM_FUNC_START(__cpu_setup)
tlbi vmalle1 // Invalidate local TLB
dsb nsh