add the header file for TW3

I add the display header file for TW3 device.
This header file is not accepted on TW2 device.
From now, TW2 does not show the image on the screen
with this packages. It should be change the kernel
header file to display the image on the screen.

Change-Id: I30f5d6c6cffdb5ae0e4105c6218162464a396ff6

diff --git a/src/exynos9110_decon-fb.h b/src/exynos9110_decon-fb.h
new file mode 100755 (executable)
index 0000000..f3d2115
--- /dev/null
+++ b/src/exynos9110_decon-fb.h
@@ -0,0 +1,436 @@
+/****************************************************************************
+ ****************************************************************************
+ ***
+ ***   This header was automatically generated from a Linux kernel header
+ ***   of the same name, to make information necessary for userspace to
+ ***   call into the kernel available to libc.  It contains only constants,
+ ***   structures, and macros generated from the original header, and thus,
+ ***   contains no copyrightable information.
+ ***
+ ***   To edit the content of this header, modify the corresponding
+ ***   source file (e.g. under external/kernel-headers/original/) then
+ ***   run bionic/libc/kernel/tools/update_all.py
+ ***
+ ***   Any manual change here will be lost the next time this script will
+ ***   be run. You've been warned!
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef ___SAMSUNG_DECON_H__
+#define ___SAMSUNG_DECON_H__
+#define S3C_FB_MAX_WIN (7)
+#define MAX_DECON_WIN (3)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define DECON_WIN_UPDATE_IDX MAX_DECON_WIN
+#define MAX_BUF_PLANE_CNT (3)
+#define MAX_PLANE_CNT          3
+typedef unsigned int u32;
+typedef uint64_t dma_addr_t;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct decon_win_rect {
+ int x;
+ int y;
+ u32 w;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 h;
+};
+struct decon_rect {
+ int left;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ int top;
+ int right;
+ int bottom;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct s3c_fb_user_window {
+ int x;
+ int y;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct s3c_fb_user_plane_alpha {
+ int channel;
+ unsigned char red;
+ unsigned char green;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned char blue;
+};
+struct s3c_fb_user_chroma {
+ int enabled;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned char red;
+ unsigned char green;
+ unsigned char blue;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct s3c_fb_user_ion_client {
+ int fd[MAX_BUF_PLANE_CNT];
+ int offset;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum decon_pixel_format {
+ DECON_PIXEL_FORMAT_ARGB_8888 = 0,
+ DECON_PIXEL_FORMAT_ABGR_8888,
+ DECON_PIXEL_FORMAT_RGBA_8888,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ DECON_PIXEL_FORMAT_BGRA_8888,
+ DECON_PIXEL_FORMAT_XRGB_8888,
+ DECON_PIXEL_FORMAT_XBGR_8888,
+ DECON_PIXEL_FORMAT_RGBX_8888,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ DECON_PIXEL_FORMAT_BGRX_8888,
+ DECON_PIXEL_FORMAT_RGBA_5551,
+ DECON_PIXEL_FORMAT_RGB_565,
+ DECON_PIXEL_FORMAT_NV16,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ DECON_PIXEL_FORMAT_NV61,
+ DECON_PIXEL_FORMAT_YVU422_3P,
+ DECON_PIXEL_FORMAT_NV12,
+ DECON_PIXEL_FORMAT_NV21,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ DECON_PIXEL_FORMAT_NV12M,
+ DECON_PIXEL_FORMAT_NV21M,
+ DECON_PIXEL_FORMAT_YUV420,
+ DECON_PIXEL_FORMAT_YVU420,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ DECON_PIXEL_FORMAT_YUV420M,
+ DECON_PIXEL_FORMAT_YVU420M,
+ DECON_PIXEL_FORMAT_MAX,
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum decon_blending {
+ DECON_BLENDING_NONE = 0,
+ DECON_BLENDING_PREMULT = 1,
+ DECON_BLENDING_COVERAGE = 2,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ DECON_BLENDING_MAX = 3,
+};
+enum otf_status {
+ S3C_FB_DMA,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ S3C_FB_LOCAL,
+ S3C_FB_STOP_DMA,
+ S3C_FB_READY_TO_LOCAL,
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum vpp_rotate {
+ VPP_ROT_NORMAL = 0x0,
+ VPP_ROT_XFLIP,
+ VPP_ROT_YFLIP,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ VPP_ROT_180,
+ VPP_ROT_90,
+ VPP_ROT_90_XFLIP,
+ VPP_ROT_90_YFLIP,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ VPP_ROT_270,
+};
+enum vpp_csc_eq {
+ BT_601_NARROW = 0x0,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ BT_601_WIDE,
+ BT_709_NARROW,
+ BT_709_WIDE,
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum decon_idma_type {
+ IDMA_G0 = 0x0,
+ IDMA_G1,
+ IDMA_VG0,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ IDMA_VG1,
+ IDMA_VGR0,
+ IDMA_VGR1,
+ IDMA_G2,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ IDMA_G3,
+};
+struct vpp_params {
+ dma_addr_t addr[MAX_BUF_PLANE_CNT];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ enum vpp_rotate rot;
+ enum vpp_csc_eq eq_mode;
+};
+
+enum dpp_rotate {
+       DPP_ROT_NORMAL = 0x0,
+       DPP_ROT_XFLIP,
+       DPP_ROT_YFLIP,
+       DPP_ROT_180,
+       DPP_ROT_90,
+       DPP_ROT_90_XFLIP,
+       DPP_ROT_90_YFLIP,
+       DPP_ROT_270,
+};
+
+enum dpp_csc_eq {
+       /* eq_mode : 6bits [5:0] */
+       CSC_STANDARD_SHIFT = 0,
+       CSC_BT_601 = 0,
+       CSC_BT_709 = 1,
+       CSC_BT_2020 = 2,
+       CSC_DCI_P3 = 3,
+       /* eq_mode : 3bits [8:6] */
+       CSC_RANGE_SHIFT = 6,
+       CSC_RANGE_LIMITED = 0x0,
+       CSC_RANGE_FULL = 0x1,
+};
+
+enum dpp_comp_src {
+       DPP_COMP_SRC_NONE = 0,
+       DPP_COMP_SRC_G2D,
+       DPP_COMP_SRC_GPU
+};
+
+enum dpp_hdr_standard {
+       DPP_HDR_OFF = 0,
+       DPP_HDR_ST2084,
+       DPP_HDR_HLG,
+};
+struct dpp_params {
+ dma_addr_t addr[MAX_PLANE_CNT];
+ enum dpp_rotate rot;
+ enum dpp_csc_eq eq_mode;
+ enum dpp_comp_src comp_src;
+ enum dpp_hdr_standard hdr_std;
+ u32 min_luminance;
+ u32 max_luminance;
+};
+
+struct decon_frame {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ int x;
+ int y;
+ u32 w;
+ u32 h;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 f_w;
+ u32 f_h;
+};
+struct decon_win_config {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ enum {
+ DECON_WIN_STATE_DISABLED = 0,
+ DECON_WIN_STATE_COLOR,
+ DECON_WIN_STATE_BUFFER,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ DECON_WIN_STATE_UPDATE,
+ DECON_WIN_STATE_CURSOR,
+ } state;
+ union {
+ __u32 color;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ struct {
+ int fd_idma[3];
+ int fence_fd;
+ int temp_fd;
+ int plane_alpha;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ enum decon_blending blending;
+ enum decon_idma_type idma_type;
+ enum decon_pixel_format format;
+ struct dpp_params dpp_parm;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ struct decon_win_rect block_area;
+ struct decon_win_rect                  transparent_area;
+ struct decon_win_rect                 opaque_area;
+ /* source framebuffer coordinates */
+ struct decon_frame src;
+ };
+ };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ struct decon_frame dst;
+ bool protection;
+ bool compression;
+};
+struct decon_win_config_data {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ int fence;
+ int fd_odma;
+ struct decon_win_config config[MAX_DECON_WIN + 1];
+};
+
+#define SCLK_MAX_BUF   3
+#define SCLK_MAX_POS   2
+#define SCLK_MAX_TIME  4
+
+enum metadata_ops {
+       METADATA_OP_AOD_SET_INFO,
+       METADATA_OP_AOD_SET_STATE,
+       METADATA_OP_MAX,
+};
+
+enum aod_request_type {
+       AOD_SET_CONFIG,
+       AOD_UPDATE_DATA,
+};
+
+enum aod_state {
+       AOD_OFF,
+       AOD_ENTER,
+       AOD_UPDATE_REQ,
+       AOD_UPDATE_DONE,
+       AOD_EXIT,
+};
+
+enum aod_mode {
+       AOD_DISABLE,
+       AOD_ALPM,
+       AOD_HLPM,
+       AOD_SCLK_ANALOG,
+       AOD_SCLK_DIGITAL,
+};
+
+struct sclk_analog_cfg {
+       unsigned int    pos[SCLK_MAX_POS];
+       unsigned int    timestamp[SCLK_MAX_TIME];
+       unsigned int    rate;
+       unsigned int    buf_id[SCLK_MAX_BUF];
+       uint64_t        addr[SCLK_MAX_BUF];
+};
+
+struct sclk_digital_cfg {
+       unsigned int circle_r;
+       unsigned int circle1[SCLK_MAX_POS];
+       unsigned int circle2[SCLK_MAX_POS];
+       unsigned int color[SCLK_MAX_BUF];
+       unsigned int rate;
+};
+
+struct aod_config {
+       enum aod_request_type req;
+       enum aod_mode mode;
+       union {
+               struct sclk_analog_cfg analog_cfg;
+               struct sclk_digital_cfg digital_cfg;
+       };
+};
+
+struct decon_metadata {
+       enum metadata_ops ops;
+       union {
+               enum aod_state state;
+               struct aod_config aod_cfg;
+       };
+};
+
+struct sclk_analog_hand {
+       unsigned int    x;
+       unsigned int    y;
+       unsigned int    width;
+       unsigned int    height;
+       unsigned int    mask_x;
+       unsigned int    mask_y;
+       unsigned int    mask_w;
+       unsigned int    mask_h;
+       unsigned int    flip_enable;
+       unsigned int    layer_order;
+       unsigned int    layer_mask;
+       unsigned int    motion;
+       unsigned int    timestamp;
+       unsigned int    buf_id;
+       uint64_t                addr;
+       void                    *tbm_bo;
+};
+
+struct sclk_analog_cfg_v2 {
+       unsigned int req;
+       unsigned int rate;
+       unsigned int flip_start;
+       unsigned int flip_end;
+       struct sclk_analog_hand hour;
+       struct sclk_analog_hand min;
+       struct sclk_analog_hand sec;
+};
+
+
+struct sclk_digital_hand {
+       unsigned int x[2];
+       unsigned int y[2];
+       unsigned int zero_digit;
+       unsigned int font_index;
+       unsigned int font_type;
+       unsigned int mask;
+       unsigned int blink_enable;
+       int time_diff;
+};
+
+struct sclk_digital_font {
+       unsigned int digit_w;
+       unsigned int digit_h;
+       unsigned int colon_w;
+       unsigned int colon_h;
+};
+
+struct sclk_digital_cfg_v2 {
+       struct sclk_digital_hand hour;
+       struct sclk_digital_hand min;
+       struct sclk_digital_hand sec;
+       struct sclk_digital_hand blink1;
+       struct sclk_digital_hand blink2;
+       struct sclk_digital_hand world_clock1_hour;
+       struct sclk_digital_hand world_clock1_minute;
+       struct sclk_digital_hand world_clock2_hour;
+       struct sclk_digital_hand world_clock2_minute;
+       struct sclk_digital_font font1;
+       struct sclk_digital_font font2;
+       unsigned int req;
+       unsigned int world_clock1_mask;
+       unsigned int world_clock2_mask;
+       unsigned int world_clock_position;
+       unsigned int world_clock_y;
+       unsigned int font_type;
+       unsigned int font_format;
+       unsigned int watch_format;
+       unsigned int blink_rate;
+       unsigned int blink_sync;
+       unsigned int font_buf_id;
+       uint64_t font_addr;
+       void *font_tbm_bo;
+};
+
+struct sclk_time_cfg_v2 {
+       unsigned int req;
+       unsigned int hour;
+       unsigned int minute;
+       unsigned int second;
+       unsigned int millisecond;
+};
+
+struct sclk_icon_cfg_v2 {
+       unsigned int req;
+       unsigned int x;
+       unsigned int y;
+       unsigned int w;
+       unsigned int h;
+       unsigned int mask;
+       uint64_t                addr;
+       void                    *tbm_bo;
+};
+
+struct sclk_move_cfg_v2 {
+       unsigned int req;
+       unsigned int x;
+       unsigned int y;
+       unsigned int w;
+       unsigned int h;
+       unsigned int clock_mask;
+       unsigned int blink_mask;
+       unsigned int icon_mask;
+       unsigned int mask;
+};
+
+#define S3CFB_METADATA_SET             _IOW('F', 230, struct decon_metadata)
+
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define S3CFB_WIN_POSITION _IOW('F', 203, struct s3c_fb_user_window)
+#define S3CFB_WIN_SET_PLANE_ALPHA _IOW('F', 204, struct s3c_fb_user_plane_alpha)
+#define S3CFB_WIN_SET_CHROMA _IOW('F', 205, struct s3c_fb_user_chroma)
+#define S3CFB_SET_VSYNC_INT _IOW('F', 206, __u32)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define S3CFB_GET_ION_USER_HANDLE _IOWR('F', 208, struct s3c_fb_user_ion_client)
+#define S3CFB_WIN_CONFIG _IOW('F', 209, struct decon_win_config_data)
+#define S3CFB_WIN_PSR_EXIT _IOW('F', 210, int)
+#define EXYNOS_GET_HDMI_CONFIG _IOW('F', 220, struct exynos_hdmi_data)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define EXYNOS_SET_HDMI_CONFIG _IOW('F', 221, struct exynos_hdmi_data)
+#endif

diff --git a/src/tdm_exynos.h b/src/tdm_exynos.h
index 96e464ff062d0ed884185d1162d50914ac7df157..438c8a63322f604d3dde0020274df6eba540407d 100644 (file)
--- a/src/tdm_exynos.h
+++ b/src/tdm_exynos.h
@@ -21,7 +21,11 @@
 #include <tdm_log.h>
 #include <tdm_list.h>
 #include "exynos_pp.h"
+#if 1
+#include "exynos9110_decon-fb.h"
+#else
 #include "decon-fb.h"
+#endif
 
 #include <tdm_helper.h>
 #include "tdm_exynos_format.h"