#define ti_UP TImode
#define ei_UP EImode
#define oi_UP OImode
+#define hf_UP HFmode
+#define si_UP SImode
#define UP(X) X##_UP
VAR11 (T, N, A, B, C, D, E, F, G, H, I, J, K) \
VAR1 (T, N, L)
-/* The NEON builtin data can be found in arm_neon_builtins.def.
- The mode entries in the following table correspond to the "key" type of the
- instruction variant, i.e. equivalent to that which would be specified after
- the assembler mnemonic, which usually refers to the last vector operand.
- The modes listed per instruction should be the same as those defined for
- that instruction's pattern in neon.md. */
+/* The NEON builtin data can be found in arm_neon_builtins.def and
+ arm_vfp_builtins.def. The entries in arm_neon_builtins.def require
+ TARGET_NEON to be true. The entries in arm_vfp_builtins.def require
+ TARGET_VFP to be true. The feature tests are checked when the builtins are
+ expanded.
+
+ The mode entries in the following table correspond to
+ the "key" type of the instruction variant, i.e. equivalent to that which
+ would be specified after the assembler mnemonic, which usually refers to the
+ last vector operand. The modes listed per instruction should be the same as
+ those defined for that instruction's pattern in neon.md. */
+
+static neon_builtin_datum vfp_builtin_data[] =
+{
+#include "arm_vfp_builtins.def"
+};
static neon_builtin_datum neon_builtin_data[] =
{
#undef CRYPTO2
#undef CRYPTO3
+ ARM_BUILTIN_VFP_BASE,
+
+#include "arm_vfp_builtins.def"
+
ARM_BUILTIN_NEON_BASE,
ARM_BUILTIN_NEON_LANE_CHECK = ARM_BUILTIN_NEON_BASE,
ARM_BUILTIN_MAX
};
+#define ARM_BUILTIN_VFP_PATTERN_START \
+ (ARM_BUILTIN_VFP_BASE + 1)
+
#define ARM_BUILTIN_NEON_PATTERN_START \
(ARM_BUILTIN_NEON_BASE + 1)
}
}
+/* Set up all the scalar floating point builtins. */
+
+static void
+arm_init_vfp_builtins (void)
+{
+ unsigned int i, fcode = ARM_BUILTIN_VFP_PATTERN_START;
+
+ for (i = 0; i < ARRAY_SIZE (vfp_builtin_data); i++, fcode++)
+ {
+ neon_builtin_datum *d = &vfp_builtin_data[i];
+ arm_init_neon_builtin (fcode, d);
+ }
+}
+
static void
arm_init_crypto_builtins (void)
{
if (TARGET_HARD_FLOAT)
{
arm_init_neon_builtins ();
-
+ arm_init_vfp_builtins ();
arm_init_crypto_builtins ();
}
return arm_expand_neon_builtin_1 (fcode, exp, target, d);
}
+/* Expand a VFP builtin, if TARGET_VFP is true. These builtins are treated like
+ neon builtins except that the data is looked up in table
+ VFP_BUILTIN_DATA. */
+
+static rtx
+arm_expand_vfp_builtin (int fcode, tree exp, rtx target)
+{
+ if (fcode >= ARM_BUILTIN_VFP_BASE && ! TARGET_VFP)
+ {
+ fatal_error (input_location,
+ "You must enable VFP instructions"
+ " to use these intrinsics.");
+ return const0_rtx;
+ }
+
+ neon_builtin_datum *d
+ = &vfp_builtin_data[fcode - ARM_BUILTIN_VFP_PATTERN_START];
+
+ return arm_expand_neon_builtin_1 (fcode, exp, target, d);
+}
+
/* Expand an expression EXP that calls a built-in function,
with result going to TARGET if that's convenient
(and in mode MODE if that's convenient).
if (fcode >= ARM_BUILTIN_NEON_BASE)
return arm_expand_neon_builtin (fcode, exp, target);
+ if (fcode >= ARM_BUILTIN_VFP_BASE)
+ return arm_expand_vfp_builtin (fcode, exp, target);
+
/* Check in the context of the function making the call whether the
builtin is supported. */
if (fcode >= ARM_BUILTIN_CRYPTO_BASE
&& (!TARGET_CRYPTO || !TARGET_HARD_FLOAT))
{
fatal_error (input_location,
- "You must enable crypto intrinsics (e.g. include -mfloat-abi=softfp -mfpu=crypto-neon...) to use these intrinsics.");
+ "You must enable crypto instructions"
+ " (e.g. include -mfloat-abi=softfp -mfpu=crypto-neon...)"
+ " to use these intrinsics.");
return const0_rtx;
}
--- /dev/null
+/* VFP instruction builtin definitions.
+ Copyright (C) 2016 Free Software Foundation, Inc.
+ Contributed by ARM Ltd.
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+/* This file lists the builtins that may be available when VFP is enabled but
+ not NEON is enabled. The entries otherwise have the same requirements and
+ generate the same structures as those in the arm_neon_builtins.def. */
+
+/* FP16 Arithmetic instructions. */
+VAR1 (UNOP, vabs, hf)
+VAR2 (UNOP, vcvths, hf, si)
+VAR2 (UNOP, vcvthu, hf, si)
+VAR1 (UNOP, vcvtahs, si)
+VAR1 (UNOP, vcvtahu, si)
+VAR1 (UNOP, vcvtmhs, si)
+VAR1 (UNOP, vcvtmhu, si)
+VAR1 (UNOP, vcvtnhs, si)
+VAR1 (UNOP, vcvtnhu, si)
+VAR1 (UNOP, vcvtphs, si)
+VAR1 (UNOP, vcvtphu, si)
+VAR1 (UNOP, vrnd, hf)
+VAR1 (UNOP, vrnda, hf)
+VAR1 (UNOP, vrndi, hf)
+VAR1 (UNOP, vrndm, hf)
+VAR1 (UNOP, vrndn, hf)
+VAR1 (UNOP, vrndp, hf)
+VAR1 (UNOP, vrndx, hf)
+VAR1 (UNOP, vsqrt, hf)
+
+VAR2 (BINOP, vcvths_n, hf, si)
+VAR2 (BINOP, vcvthu_n, hf, si)
+VAR1 (BINOP, vmaxnm, hf)
+VAR1 (BINOP, vminnm, hf)
+
+VAR1 (TERNOP, vfma, hf)
+VAR1 (TERNOP, vfms, hf)
$(srcdir)/config/arm/arm-cores.def \
$(srcdir)/config/arm/arm-arches.def $(srcdir)/config/arm/arm-fpus.def \
$(srcdir)/config/arm/arm-protos.h \
- $(srcdir)/config/arm/arm_neon_builtins.def
+ $(srcdir)/config/arm/arm_neon_builtins.def \
+ $(srcdir)/config/arm/arm_vfp_builtins.def
arm-builtins.o: $(srcdir)/config/arm/arm-builtins.c $(CONFIG_H) \
$(SYSTEM_H) coretypes.h $(TM_H) \
$(DIAGNOSTIC_CORE_H) $(OPTABS_H) \
$(srcdir)/config/arm/arm-protos.h \
$(srcdir)/config/arm/arm_neon_builtins.def \
+ $(srcdir)/config/arm/arm_vfp_builtins.def \
$(srcdir)/config/arm/arm-simd-builtin-types.def
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
$(srcdir)/config/arm/arm-builtins.c
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