MIPS: Do not reload unallocated FP_REGS pseudos via GR_REGS

gcc/

	* config/mips/mips.c (mips_secondary_reload_class): Handle
	regno < 0 case.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215120 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4f9d1cf..154b9da 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-09-10  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+       * config/mips/mips.c (mips_secondary_reload_class): Handle
+       regno < 0 case.
+
 2014-09-10  Robert Suchanek   <robert.suchanek@imgtec.com>
 
        * lra-lives.c (process_bb_lives): Replace assignment with bitwise OR

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 646bb4d..d1d4def 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -12143,8 +12143,9 @@ mips_secondary_reload_class (enum reg_class rclass,
 
   if (reg_class_subset_p (rclass, FP_REGS))
     {
-      if (MEM_P (x)
-         && (GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8))
+      if (regno < 0
+         || (MEM_P (x)
+             && (GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8)))
        /* In this case we can use lwc1, swc1, ldc1 or sdc1.  We'll use
           pairs of lwc1s and swc1s if ldc1 and sdc1 are not supported.  */
        return NO_REGS;