Merge tag 'imx-fixes-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo...

i.MX fixes for 6.4:

- A couple of i.MX8MN/P video clock changes from Adam Ford to fix issue
  with clock re-parenting.
- Add missing pvcie-supply regulator for imx6qdl-mba6 board.
- A series of colibri-imx8x board fixes on pin configuration.
- Set and limit the mode for PMIC bucks for imx6ull-dhcor board to fix
  stability problems.
- A couple of changes from Frank Li to correct cdns,usb3 bindings
  cdns,on-chip-buff-size property and fix USB 3.0 gadget failure on
  i.MX8QM & QXPB0.
- Add a required PHY deassert delay for imx8mn-var-som board to fix PHY
  detection failure.

* tag 'imx-fixes-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx8: fix USB 3.0 Gadget Failure in QM & QXPB0 at super speed
  dt-binding: cdns,usb3: Fix cdns,on-chip-buff-size type
  arm64: dts: colibri-imx8x: delete adc1 and dsp
  arm64: dts: colibri-imx8x: fix iris pinctrl configuration
  arm64: dts: colibri-imx8x: move pinctrl property from SoM to eval board
  arm64: dts: colibri-imx8x: fix eval board pin configuration
  arm64: dts: imx8mp: Fix video clock parents
  ARM: dts: imx6qdl-mba6: Add missing pvcie-supply regulator
  ARM: dts: imx6ull-dhcor: Set and limit the mode for PMIC buck 1, 2 and 3
  arm64: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay
  arm64: dts: imx8mn: Fix video clock parents

Link: https://lore.kernel.org/r/20230516133625.GI767028@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
index cae46c4..69a93a0 100644 (file)
--- a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
+++ b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
@@ -64,7 +64,7 @@ properties:
     description:
       size of memory intended as internal memory for endpoints
       buffers expressed in KB
-    $ref: /schemas/types.yaml#/definitions/uint32
+    $ref: /schemas/types.yaml#/definitions/uint16
 
   cdns,phyrst-a-enable:
     description: Enable resetting of PHY if Rx fail is detected

diff --git a/arch/arm/boot/dts/imx6qdl-mba6.dtsi b/arch/arm/boot/dts/imx6qdl-mba6.dtsi
index 78555a6..7b7e6c2 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-mba6.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-mba6.dtsi
@@ -209,6 +209,7 @@
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pcie>;
        reset-gpio = <&gpio6 7 GPIO_ACTIVE_LOW>;
+       vpcie-supply = <&reg_pcie>;
        status = "okay";
 };
 

diff --git a/arch/arm/boot/dts/imx6ull-dhcor-som.dtsi b/arch/arm/boot/dts/imx6ull-dhcor-som.dtsi
index 5882c75..32a6022 100644 (file)
--- a/arch/arm/boot/dts/imx6ull-dhcor-som.dtsi
+++ b/arch/arm/boot/dts/imx6ull-dhcor-som.dtsi
@@ -8,6 +8,7 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/leds/common.h>
 #include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/regulator/dlg,da9063-regulator.h>
 #include "imx6ull.dtsi"
 
 / {
@@ -84,16 +85,20 @@
 
                regulators {
                        vdd_soc_in_1v4: buck1 {
+                               regulator-allowed-modes = <DA9063_BUCK_MODE_SLEEP>; /* PFM */
                                regulator-always-on;
                                regulator-boot-on;
+                               regulator-initial-mode = <DA9063_BUCK_MODE_SLEEP>;
                                regulator-max-microvolt = <1400000>;
                                regulator-min-microvolt = <1400000>;
                                regulator-name = "vdd_soc_in_1v4";
                        };
 
                        vcc_3v3: buck2 {
+                               regulator-allowed-modes = <DA9063_BUCK_MODE_SYNC>; /* PWM */
                                regulator-always-on;
                                regulator-boot-on;
+                               regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
                                regulator-max-microvolt = <3300000>;
                                regulator-min-microvolt = <3300000>;
                                regulator-name = "vcc_3v3";
@@ -106,8 +111,10 @@
                         * the voltage is set to 1.5V.
                         */
                        vcc_ddr_1v35: buck3 {
+                               regulator-allowed-modes = <DA9063_BUCK_MODE_SYNC>; /* PWM */
                                regulator-always-on;
                                regulator-boot-on;
+                               regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
                                regulator-max-microvolt = <1500000>;
                                regulator-min-microvolt = <1500000>;
                                regulator-name = "vcc_ddr_1v35";

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
index 2209c1a..e62a435 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
@@ -171,6 +171,7 @@ conn_subsys: bus@5b000000 {
                        interrupt-names = "host", "peripheral", "otg", "wakeup";
                        phys = <&usb3_phy>;
                        phy-names = "cdns3,usb3-phy";
+                       cdns,on-chip-buff-size = /bits/ 16 <18>;
                        status = "disabled";
                };
        };

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi
index 67072e6..cbd9d12 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi
@@ -98,11 +98,17 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               ethphy: ethernet-phy@4 {
+               ethphy: ethernet-phy@4 { /* AR8033 or ADIN1300 */
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <4>;
                        reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
                        reset-assert-us = <10000>;
+                       /*
+                        * Deassert delay:
+                        * ADIN1300 requires 5ms.
+                        * AR8033   requires 1ms.
+                        */
+                       reset-deassert-us = <20000>;
                };
        };
 };

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index bd84db5..8be8f09 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -1069,13 +1069,6 @@
                                         <&clk IMX8MN_CLK_DISP_APB_ROOT>,
                                         <&clk IMX8MN_CLK_DISP_AXI_ROOT>;
                                clock-names = "pix", "axi", "disp_axi";
-                               assigned-clocks = <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>,
-                                                 <&clk IMX8MN_CLK_DISP_AXI>,
-                                                 <&clk IMX8MN_CLK_DISP_APB>;
-                               assigned-clock-parents = <&clk IMX8MN_CLK_DISP_PIXEL>,
-                                                        <&clk IMX8MN_SYS_PLL2_1000M>,
-                                                        <&clk IMX8MN_SYS_PLL1_800M>;
-                               assigned-clock-rates = <594000000>, <500000000>, <200000000>;
                                interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
                                power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_LCDIF>;
                                status = "disabled";
@@ -1093,12 +1086,6 @@
                                clocks = <&clk IMX8MN_CLK_DSI_CORE>,
                                         <&clk IMX8MN_CLK_DSI_PHY_REF>;
                                clock-names = "bus_clk", "sclk_mipi";
-                               assigned-clocks = <&clk IMX8MN_CLK_DSI_CORE>,
-                                                 <&clk IMX8MN_CLK_DSI_PHY_REF>;
-                               assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>,
-                                                        <&clk IMX8MN_CLK_24M>;
-                               assigned-clock-rates = <266000000>, <24000000>;
-                               samsung,pll-clock-frequency = <24000000>;
                                interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
                                power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_DSI>;
                                status = "disabled";
@@ -1142,6 +1129,21 @@
                                              "lcdif-axi", "lcdif-apb", "lcdif-pix",
                                              "dsi-pclk", "dsi-ref",
                                              "csi-aclk", "csi-pclk";
+                               assigned-clocks = <&clk IMX8MN_CLK_DSI_CORE>,
+                                                 <&clk IMX8MN_CLK_DSI_PHY_REF>,
+                                                 <&clk IMX8MN_CLK_DISP_PIXEL>,
+                                                 <&clk IMX8MN_CLK_DISP_AXI>,
+                                                 <&clk IMX8MN_CLK_DISP_APB>;
+                               assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>,
+                                                        <&clk IMX8MN_CLK_24M>,
+                                                        <&clk IMX8MN_VIDEO_PLL1_OUT>,
+                                                        <&clk IMX8MN_SYS_PLL2_1000M>,
+                                                        <&clk IMX8MN_SYS_PLL1_800M>;
+                               assigned-clock-rates = <266000000>,
+                                                      <24000000>,
+                                                      <594000000>,
+                                                      <500000000>,
+                                                      <200000000>;
                                #power-domain-cells = <1>;
                        };
 

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index f813919..428c604 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1211,13 +1211,6 @@
                                         <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
                                         <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
                                clock-names = "pix", "axi", "disp_axi";
-                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>,
-                                                 <&clk IMX8MP_CLK_MEDIA_AXI>,
-                                                 <&clk IMX8MP_CLK_MEDIA_APB>;
-                               assigned-clock-parents = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
-                                                        <&clk IMX8MP_SYS_PLL2_1000M>,
-                                                        <&clk IMX8MP_SYS_PLL1_800M>;
-                               assigned-clock-rates = <594000000>, <500000000>, <200000000>;
                                interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
                                power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_LCDIF_1>;
                                status = "disabled";
@@ -1237,11 +1230,6 @@
                                         <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
                                         <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
                                clock-names = "pix", "axi", "disp_axi";
-                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
-                                                 <&clk IMX8MP_VIDEO_PLL1>;
-                               assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>,
-                                                        <&clk IMX8MP_VIDEO_PLL1_REF_SEL>;
-                               assigned-clock-rates = <0>, <1039500000>;
                                power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_LCDIF_2>;
                                status = "disabled";
 
@@ -1296,11 +1284,16 @@
                                              "disp1", "disp2", "isp", "phy";
 
                                assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
-                                                 <&clk IMX8MP_CLK_MEDIA_APB>;
+                                                 <&clk IMX8MP_CLK_MEDIA_APB>,
+                                                 <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
+                                                 <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
+                                                 <&clk IMX8MP_VIDEO_PLL1>;
                                assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
-                                                        <&clk IMX8MP_SYS_PLL1_800M>;
-                               assigned-clock-rates = <500000000>, <200000000>;
-
+                                                        <&clk IMX8MP_SYS_PLL1_800M>,
+                                                        <&clk IMX8MP_VIDEO_PLL1_OUT>,
+                                                        <&clk IMX8MP_VIDEO_PLL1_OUT>;
+                               assigned-clock-rates = <500000000>, <200000000>,
+                                                      <0>, <0>, <1039500000>;
                                #power-domain-cells = <1>;
 
                                lvds_bridge: bridge@5c {

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi
index 7264d78..9af769a 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi
@@ -33,6 +33,12 @@
        };
 };
 
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
+                   <&pinctrl_lpspi2_cs2>;
+};
+
 /* Colibri SPI */
 &lpspi2 {
        status = "okay";

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
index 5f30c88..f895306 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
@@ -48,8 +48,7 @@
                           <IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28           0x20>,          /* SODIMM 101 */
                           <IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27            0x20>,          /* SODIMM  97 */
                           <IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03     0x06000020>,    /* SODIMM  85 */
-                          <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26            0x20>,          /* SODIMM  79 */
-                          <IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10        0x06700041>;    /* SODIMM  45 */
+                          <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26            0x20>;          /* SODIMM  79 */
        };
 
        pinctrl_uart1_forceoff: uart1forceoffgrp {

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index 7cad791..49d105e 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -363,10 +363,6 @@
 /* TODO VPU Encoder/Decoder */
 
 &iomuxc {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
-                   <&pinctrl_hog2>, <&pinctrl_lpspi2_cs2>;
-
        /* On-module touch pen-down interrupt */
        pinctrl_ad7879_int: ad7879intgrp {
                fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05  0x21>;
@@ -499,8 +495,7 @@
        };
 
        pinctrl_hog1: hog1grp {
-               fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01                    0x20>,          /* SODIMM  75 */
-                          <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16                 0x20>;          /* SODIMM  93 */
+               fsl,pins = <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16                 0x20>;          /* SODIMM  93 */
        };
 
        pinctrl_hog2: hog2grp {
@@ -774,3 +769,10 @@
                fsl,pins = <IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20>;
        };
 };
+
+/* Delete peripherals which are not present on SOC, but are defined in imx8-ss-*.dtsi */
+
+/delete-node/ &adc1;
+/delete-node/ &adc1_lpcg;
+/delete-node/ &dsp;
+/delete-node/ &dsp_lpcg;