"dsi_meas",
"mipi_enable_gate",
"mipi_bandgap_gate";
- reg = <0x0 0xffd00000 0x0 0x6400
+ reg = <0x0 0xffd06000 0x0 0x400
0x0 0xff640000 0x0 0x100>;
pinctrl_version = <1>; /* for uboot */
"dsi_meas",
"encl_top_gate",
"encl_int_gate";
- reg = <0x0 0xffd00000 0x0 0x7400
+ reg = <0x0 0xffd07000 0x0 0x400
0x0 0xff644000 0x0 0x2000>;
pinctrl_version = <2>; /* for uboot */
"\n"
" echo <num> > test ; show lcd bist pattern(1~7), 0=disable bist\n"
"\n"
-" echo w<v|h|c|p> <reg> <data> > reg ; write data to vcbus|hiu|cbus|periphs reg\n"
-" echo r<v|h|c|p> <reg> > reg ; read vcbus|hiu|cbus|periphs reg\n"
-" echo d<v|h|c|p> <reg> <num> > reg ; dump vcbus|hiu|cbus|periphs regs\n"
+" echo w<v|h|c|p|mh|mp> <reg> <data> > reg ; write data to vcbus|hiu|cbus|periphs|mipi host|mipi phy reg\n"
+" echo r<v|h|c|p|mh|mp> <reg> > reg ; read vcbus|hiu|cbus|periphs|mipi host|mipi phy reg\n"
+" echo d<v|h|c|p|mh|mp> <reg> <num> > reg ; dump vcbus|hiu|cbus|periphs|mipi host|mipi phy regs\n"
"\n"
" echo <0|1> > print ; 0=disable debug print; 1=enable debug print\n"
" cat print ; read current debug print flag\n"
void __iomem *p;
int reg_bus;
unsigned int reg_offset;
- struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
reg_bus = LCD_MAP_DSI_HOST;
if (check_lcd_ioremap(reg_bus))
return NULL;
- switch (lcd_drv->data->chip_type) {
- case LCD_CHIP_G12A:
- reg_offset = _reg + 0x400;
- reg_offset = LCD_REG_OFFSET(reg_offset);
- break;
- default:/*axg*/
- reg_offset = LCD_REG_OFFSET(_reg);
- break;
- }
+ reg_offset = LCD_REG_OFFSET_MIPI_HOST(_reg);
if (reg_offset >= lcd_reg_map[reg_bus].size) {
LCDERR("invalid dsi_host reg offset: 0x%04x\n", _reg);
return NULL;
/* base & offset */
#define LCD_REG_OFFSET(reg) ((reg << 2))
+#define LCD_REG_OFFSET_MIPI_HOST(reg) (((reg & 0xff) << 2))
/* PERIPHS: 0xc8834400 */