; RUN: opt < %s -instcombine -S | FileCheck %s
; With left shift, the comparison should not be modified.
-define i1 @test_shift_and_cmp_not_changed1(i8 %p) #0 {
+define i1 @test_shift_and_cmp_not_changed1(i8 %p) {
; CHECK-LABEL: @test_shift_and_cmp_not_changed1(
; CHECK-NEXT: [[SHLP:%.*]] = shl i8 %p, 5
; CHECK-NEXT: [[ANDP:%.*]] = and i8 [[SHLP]], -64
}
; With arithmetic right shift, the comparison should not be modified.
-define i1 @test_shift_and_cmp_not_changed2(i8 %p) #0 {
+define i1 @test_shift_and_cmp_not_changed2(i8 %p) {
; CHECK-LABEL: @test_shift_and_cmp_not_changed2(
; CHECK-NEXT: [[SHLP:%.*]] = ashr i8 %p, 5
; CHECK-NEXT: [[ANDP:%.*]] = and i8 [[SHLP]], -64
; This should simplify functionally to the left shift case.
; The extra input parameter should be optimized away.
-define i1 @test_shift_and_cmp_changed1(i8 %p, i8 %q) #0 {
+define i1 @test_shift_and_cmp_changed1(i8 %p, i8 %q) {
; CHECK-LABEL: @test_shift_and_cmp_changed1(
; CHECK-NEXT: [[ANDP:%.*]] = shl i8 %p, 5
; CHECK-NEXT: [[SHL:%.*]] = and i8 [[ANDP]], -64
}
; Unsigned compare allows a transformation to compare against 0.
-define i1 @test_shift_and_cmp_changed2(i8 %p) #0 {
+define i1 @test_shift_and_cmp_changed2(i8 %p) {
; CHECK-LABEL: @test_shift_and_cmp_changed2(
; CHECK-NEXT: [[ANDP:%.*]] = and i8 %p, 6
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[ANDP]], 0
ret i1 %cmp
}
+; FIXME: Vectors should fold the same way.
+define <2 x i1> @test_shift_and_cmp_changed2_vec(<2 x i8> %p) {
+; CHECK-LABEL: @test_shift_and_cmp_changed2_vec(
+; CHECK-NEXT: [[SHLP:%.*]] = shl <2 x i8> %p, <i8 5, i8 5>
+; CHECK-NEXT: [[ANDP:%.*]] = and <2 x i8> [[SHLP]], <i8 -64, i8 -64>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i8> [[ANDP]], <i8 32, i8 32>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
+;
+ %shlp = shl <2 x i8> %p, <i8 5, i8 5>
+ %andp = and <2 x i8> %shlp, <i8 -64, i8 -64>
+ %cmp = icmp ult <2 x i8> %andp, <i8 32, i8 32>
+ ret <2 x i1> %cmp
+}
+
; nsw on the shift should not affect the comparison.
-define i1 @test_shift_and_cmp_changed3(i8 %p) #0 {
+define i1 @test_shift_and_cmp_changed3(i8 %p) {
; CHECK-LABEL: @test_shift_and_cmp_changed3(
; CHECK-NEXT: [[SHLP:%.*]] = shl nsw i8 %p, 5
; CHECK-NEXT: [[ANDP:%.*]] = and i8 [[SHLP]], -64
}
; Logical shift right allows a return true because the 'and' guarantees no bits are set.
-define i1 @test_shift_and_cmp_changed4(i8 %p) #0 {
+define i1 @test_shift_and_cmp_changed4(i8 %p) {
; CHECK-LABEL: @test_shift_and_cmp_changed4(
; CHECK-NEXT: ret i1 true
;