static int cdns_pcie_host_init(struct device *dev,
struct cdns_pcie_rc *rc)
{
- struct pci_host_bridge *bridge = pci_host_bridge_from_priv(rc);
int err;
- /* Parse our PCI ranges and request their resources */
- err = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL, NULL);
- if (err)
- return err;
-
err = cdns_pcie_host_init_root_port(rc);
if (err)
return err;
if (!bridge)
return -ENOMEM;
- ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (ret)
- return ret;
-
/* Get the I/O and memory ranges from DT */
resource_list_for_each_entry(win, &bridge->windows) {
switch (resource_type(win->res)) {
if (!mobiveil_pcie_is_bridge(pcie))
return -ENODEV;
- /* parse the host bridge base addresses from the device tree file */
- ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (ret) {
- dev_err(dev, "Getting bridge resources failed\n");
- return ret;
- }
-
/*
* configure all inbound and outbound windows and prepare the RC for
* config access
return ret;
}
- ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (ret) {
- dev_err(dev, "Failed to parse resources\n");
- return ret;
- }
-
pcie->reset_gpio = devm_gpiod_get_from_of_node(dev, dev->of_node,
"reset-gpios", 0,
GPIOD_OUT_LOW,
if (IS_ERR(p->base))
return PTR_ERR(p->base);
- ret = pci_parse_request_of_pci_ranges(dev, &host->windows,
- &host->dma_ranges, NULL);
- if (ret)
- return ret;
-
win = resource_list_first_type(&host->windows, IORESOURCE_IO);
if (win) {
io = win->res;
{
int err;
struct resource cfgres;
- struct resource *bus_range = NULL;
+ struct resource_entry *bus;
struct pci_config_window *cfg;
- /* Parse our PCI ranges and request their resources */
- err = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL, &bus_range);
- if (err)
- return ERR_PTR(err);
-
err = of_address_to_resource(dev->of_node, 0, &cfgres);
if (err) {
dev_err(dev, "missing \"reg\" property\n");
return ERR_PTR(err);
}
- cfg = pci_ecam_create(dev, &cfgres, bus_range, ops);
+ bus = resource_list_first_type(&bridge->windows, IORESOURCE_BUS);
+ if (!bus)
+ return ERR_PTR(-ENODEV);
+
+ cfg = pci_ecam_create(dev, &cfgres, bus->res, ops);
if (IS_ERR(cfg))
return cfg;
}
}
- err = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (err) {
- dev_err(dev, "failed to get bridge resources\n");
- return err;
- }
-
bridge->sysdata = priv;
bridge->ops = &loongson_pci_ops;
bridge->map_irq = loongson_map_irq;
struct rcar_pci_priv *priv;
struct pci_host_bridge *bridge;
void __iomem *reg;
- int ret;
bridge = devm_pci_alloc_host_bridge(dev, sizeof(*priv));
if (!bridge)
return priv->irq;
}
- ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (ret)
- return ret;
-
bridge->ops = &rcar_pci_ops;
pci_add_flags(PCI_REASSIGN_ALL_BUS);
INIT_LIST_HEAD(&pcie->ports);
pcie->dev = dev;
- err = pci_parse_request_of_pci_ranges(dev, &host->windows, NULL, NULL);
- if (err) {
- dev_err(dev, "Getting bridge resources failed\n");
- return err;
- }
-
err = tegra_pcie_parse_dt(pcie);
if (err < 0)
return err;
if (IS_ERR(v3->config_base))
return PTR_ERR(v3->config_base);
- ret = pci_parse_request_of_pci_ranges(dev, &host->windows,
- &host->dma_ranges, NULL);
- if (ret)
- return ret;
-
/* Get and request error IRQ resource */
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
struct device *dev = &pdev->dev;
struct resource *res;
struct resource_entry *entry;
- int ret, i, myslot = -1, mem = 1;
+ int i, myslot = -1, mem = 1;
u32 val;
void __iomem *local_pci_cfg_base;
struct pci_host_bridge *bridge;
if (IS_ERR(versatile_cfg_base[1]))
return PTR_ERR(versatile_cfg_base[1]);
- ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- NULL, NULL);
- if (ret)
- return ret;
-
resource_list_for_each_entry(entry, &bridge->windows) {
if (resource_type(entry->res) == IORESOURCE_MEM) {
writel(entry->res->start >> 28, PCI_IMAP(mem));
if (ret)
return ret;
- ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (ret)
- return ret;
-
ret = xgene_pcie_setup(port);
if (ret)
return ret;
return ret;
}
- ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (ret) {
- dev_err(dev, "Failed add resources\n");
- return ret;
- }
-
ret = altera_pcie_init_irq_domain(pcie);
if (ret) {
dev_err(dev, "Failed creating IRQ Domain\n");
pcie->ssc = of_property_read_bool(np, "brcm,enable-ssc");
- ret = pci_parse_request_of_pci_ranges(pcie->dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (ret)
- return ret;
-
ret = clk_prepare_enable(pcie->clk);
if (ret) {
dev_err(&pdev->dev, "could not enable clock\n");
if (IS_ERR(pcie->phy))
return PTR_ERR(pcie->phy);
- ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (ret) {
- dev_err(dev, "unable to get PCI host bridge resources\n");
- return ret;
- }
-
/* PAXC doesn't support legacy IRQs, skip mapping */
switch (pcie->type) {
case IPROC_PCIE_PAXC:
struct device *dev = pcie->dev;
struct device_node *node = dev->of_node, *child;
struct mtk_pcie_port *port, *tmp;
- struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie);
- struct list_head *windows = &host->windows;
int err;
- err = pci_parse_request_of_pci_ranges(dev, windows,
- &host->dma_ranges, NULL);
- if (err)
- return err;
-
for_each_available_child_of_node(node, child) {
int slot;
pcie->dev = dev;
platform_set_drvdata(pdev, host);
- err = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (err)
- return err;
-
pm_runtime_enable(pcie->dev);
err = pm_runtime_get_sync(pcie->dev);
if (err < 0) {
if (err < 0)
goto err_deinit_port;
- err = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (err)
- goto err_remove_irq_domain;
-
err = rockchip_pcie_cfg_atu(rockchip);
if (err)
goto err_remove_irq_domain;
return err;
}
- err = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (err) {
- dev_err(dev, "Getting bridge resources failed\n");
- return err;
- }
-
err = nwl_pcie_init_irq_domain(pcie);
if (err) {
dev_err(dev, "Failed creating IRQ Domain\n");
return err;
}
- err = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
- &bridge->dma_ranges, NULL);
- if (err) {
- dev_err(dev, "Getting bridge resources failed\n");
- return err;
- }
-
bridge->sysdata = port;
bridge->ops = &xilinx_pcie_ops;
bridge->map_irq = of_irq_parse_and_map_pci;
EXPORT_SYMBOL_GPL(of_irq_parse_and_map_pci);
#endif /* CONFIG_OF_IRQ */
-int pci_parse_request_of_pci_ranges(struct device *dev,
- struct list_head *resources,
- struct list_head *ib_resources,
- struct resource **bus_range)
+static int pci_parse_request_of_pci_ranges(struct device *dev,
+ struct pci_host_bridge *bridge)
{
int err, res_valid = 0;
resource_size_t iobase;
struct resource_entry *win, *tmp;
- INIT_LIST_HEAD(resources);
- if (ib_resources)
- INIT_LIST_HEAD(ib_resources);
- err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, resources,
- ib_resources, &iobase);
+ INIT_LIST_HEAD(&bridge->windows);
+ INIT_LIST_HEAD(&bridge->dma_ranges);
+
+ err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &bridge->windows,
+ &bridge->dma_ranges, &iobase);
if (err)
return err;
- err = devm_request_pci_bus_resources(dev, resources);
+ err = devm_request_pci_bus_resources(dev, &bridge->windows);
if (err)
- goto out_release_res;
+ return err;
- resource_list_for_each_entry_safe(win, tmp, resources) {
+ resource_list_for_each_entry_safe(win, tmp, &bridge->windows) {
struct resource *res = win->res;
switch (resource_type(res)) {
case IORESOURCE_MEM:
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
break;
- case IORESOURCE_BUS:
- if (bus_range)
- *bus_range = res;
- break;
}
}
dev_warn(dev, "non-prefetchable memory resource required\n");
return 0;
+}
- out_release_res:
- pci_free_resource_list(resources);
- return err;
+int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge)
+{
+ if (!dev->of_node)
+ return 0;
+
+ return pci_parse_request_of_pci_ranges(dev, bridge);
}
-EXPORT_SYMBOL_GPL(pci_parse_request_of_pci_ranges);
#endif /* CONFIG_PCI */
void pci_set_bus_of_node(struct pci_bus *bus);
void pci_release_bus_of_node(struct pci_bus *bus);
+int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge);
+
#else
static inline int
of_pci_parse_bus_range(struct device_node *node, struct resource *res)
static inline void pci_release_of_node(struct pci_dev *dev) { }
static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
+
+static inline int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge)
+{
+ return 0;
+}
+
#endif /* CONFIG_OF */
#ifdef CONFIG_PCIEAER
if (ret)
return NULL;
+ ret = devm_of_pci_bridge_init(dev, bridge);
+ if (ret)
+ return NULL;
+
return bridge;
}
EXPORT_SYMBOL(devm_pci_alloc_host_bridge);
struct device_node;
struct irq_domain;
struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus);
-int pci_parse_request_of_pci_ranges(struct device *dev,
- struct list_head *resources,
- struct list_head *ib_resources,
- struct resource **bus_range);
/* Arch may override this (weak) */
struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus);
#else /* CONFIG_OF */
static inline struct irq_domain *
pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; }
-static inline int
-pci_parse_request_of_pci_ranges(struct device *dev,
- struct list_head *resources,
- struct list_head *ib_resources,
- struct resource **bus_range)
-{
- return -EINVAL;
-}
#endif /* CONFIG_OF */
static inline struct device_node *