ARM: dts: ifc6410: enable PCIe DT node for this board

Enable PCIe DT node and fill PCIe DT node with regulator, pinctrl and reset
GPIO, to use the PCIe on the ifc6410 board.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 11ac608..955c697 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -47,6 +47,18 @@
                                        bias-disable;
                                };
                        };
+
+                       pcie_pins: pcie_pinmux {
+                               mux {
+                                       pins = "gpio27";
+                                       function = "gpio";
+                               };
+                               conf {
+                                       pins = "gpio27";
+                                       drive-strength = <12>;
+                                       bias-disable;
+                               };
+                       };
                };
 
                rpm@108000 {
@@ -123,6 +135,10 @@
                                pm8921_lvs1: lvs1 {
                                        bias-pull-down;
                                };
+
+                               lvs6 {
+                                       bias-pull-down;
+                               };
                        };
                };
 
@@ -231,6 +247,16 @@
                        status = "okay";
                };
 
+               pci@1b500000 {
+                       status = "ok";
+                       vdda-supply = <&pm8921_s3>;
+                       vdda_phy-supply = <&pm8921_lvs6>;
+                       vdda_refclk-supply = <&ext_3p3v>;
+                       pinctrl-0 = <&pcie_pins>;
+                       pinctrl-names = "default";
+                       perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
+               };
+
                qcom,ssbi@500000 {
                        pmic@0 {
                                gpio@150 {