arm64/sysreg: Convert TRBPTR_EL1 register to automatic generation
authorAnshuman Khandual <anshuman.khandual@arm.com>
Wed, 14 Jun 2023 06:59:44 +0000 (12:29 +0530)
committerCatalin Marinas <catalin.marinas@arm.com>
Wed, 14 Jun 2023 13:37:34 +0000 (14:37 +0100)
This converts TRBPTR_EL1 register to automatic generation without
causing any functional change.

Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230614065949.146187-10-anshuman.khandual@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/sysreg.h
arch/arm64/tools/sysreg

index f97d08d..6b3204f 100644 (file)
 
 /*** End of Statistical Profiling Extension ***/
 
-#define SYS_TRBPTR_EL1                 sys_reg(3, 0, 9, 11, 1)
 #define SYS_TRBBASER_EL1               sys_reg(3, 0, 9, 11, 2)
 #define SYS_TRBSR_EL1                  sys_reg(3, 0, 9, 11, 3)
 #define SYS_TRBMAR_EL1                 sys_reg(3, 0, 9, 11, 4)
 #define SYS_TRBTRG_EL1                 sys_reg(3, 0, 9, 11, 6)
 #define SYS_TRBIDR_EL1                 sys_reg(3, 0, 9, 11, 7)
 
-#define TRBPTR_EL1_PTR_MASK            GENMASK_ULL(63, 0)
-#define TRBPTR_EL1_PTR_SHIFT           0
 #define TRBBASER_EL1_BASE_MASK         GENMASK_ULL(63, 12)
 #define TRBBASER_EL1_BASE_SHIFT                12
 #define TRBSR_EL1_EC_MASK              GENMASK(31, 26)
index fe24907..ec493e4 100644 (file)
@@ -2273,3 +2273,7 @@ Enum      2:1     FM
 EndEnum
 Field  0       E
 EndSysreg
+
+Sysreg TRBPTR_EL1      3       0       9       11      1
+Field  63:0    PTR
+EndSysreg