drm/amdgpu: Allow reading more status registers on si/cik

Allow userspace to read the same status registers for every family.
Based on commit c7890fea, added any of these registers if defined in
the include files of each architecture.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index f3e7660d616780cdbd840f5752d02545ef1a14dd..3378b420916254ee93dced57d79a01f268327f91 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -83,9 +83,10 @@
  * - 3.33.0 - Fixes for GDS ENOMEM failures in AMDGPU_CS.
  * - 3.34.0 - Non-DC can flip correctly between buffers with different pitches
  * - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask
+ * - 3.36.0 - Allow reading more status registers on si/cik
  */
 #define KMS_DRIVER_MAJOR       3
-#define KMS_DRIVER_MINOR       35
+#define KMS_DRIVER_MINOR       36
 #define KMS_DRIVER_PATCHLEVEL  0
 
 int amdgpu_vram_limit = 0;

diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index fc8b34480f66da2acbf91d00df667eeda6255423..2d64d270725d019e84aee05765aa26ecbcdc2a58 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -966,6 +966,25 @@ static bool cik_read_bios_from_rom(struct amdgpu_device *adev,
 
 static const struct amdgpu_allowed_register_entry cik_allowed_read_registers[] = {
        {mmGRBM_STATUS},
+       {mmGRBM_STATUS2},
+       {mmGRBM_STATUS_SE0},
+       {mmGRBM_STATUS_SE1},
+       {mmGRBM_STATUS_SE2},
+       {mmGRBM_STATUS_SE3},
+       {mmSRBM_STATUS},
+       {mmSRBM_STATUS2},
+       {mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET},
+       {mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET},
+       {mmCP_STAT},
+       {mmCP_STALLED_STAT1},
+       {mmCP_STALLED_STAT2},
+       {mmCP_STALLED_STAT3},
+       {mmCP_CPF_BUSY_STAT},
+       {mmCP_CPF_STALLED_STAT1},
+       {mmCP_CPF_STATUS},
+       {mmCP_CPC_BUSY_STAT},
+       {mmCP_CPC_STALLED_STAT1},
+       {mmCP_CPC_STATUS},
        {mmGB_ADDR_CONFIG},
        {mmMC_ARB_RAMCFG},
        {mmGB_TILE_MODE0},

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 46206a1a1f4dcb372507897b68395c1e6b611e67..22ab1955b923da8afb9877e7ae6ab78deb2f3e92 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -178,6 +178,7 @@ static struct soc15_allowed_register_entry nv_allowed_read_registers[] = {
        { SOC15_REG_ENTRY(GC, 0, mmCP_CPF_BUSY_STAT)},
        { SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STALLED_STAT1)},
        { SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STATUS)},
+       { SOC15_REG_ENTRY(GC, 0, mmCP_CPC_BUSY_STAT)},
        { SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STALLED_STAT1)},
        { SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STATUS)},
        { SOC15_REG_ENTRY(GC, 0, mmGB_ADDR_CONFIG)},

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 493af42152f265cf7e4452b4db12bb7bb0b92725..29024e64c886081b806358ccc658f8a8c18fcaf6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -975,6 +975,17 @@ static void si_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
 
 static struct amdgpu_allowed_register_entry si_allowed_read_registers[] = {
        {GRBM_STATUS},
+       {mmGRBM_STATUS2},
+       {mmGRBM_STATUS_SE0},
+       {mmGRBM_STATUS_SE1},
+       {mmSRBM_STATUS},
+       {mmSRBM_STATUS2},
+       {DMA_STATUS_REG + DMA0_REGISTER_OFFSET},
+       {DMA_STATUS_REG + DMA1_REGISTER_OFFSET},
+       {mmCP_STAT},
+       {mmCP_STALLED_STAT1},
+       {mmCP_STALLED_STAT2},
+       {mmCP_STALLED_STAT3},
        {GB_ADDR_CONFIG},
        {MC_ARB_RAMCFG},
        {GB_TILE_MODE0},

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 9be0168217f55d2fa81060145a7a24c9f172fbc6..741b564b4aa54793eb1f96c93503fbd8e30f3513 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -339,6 +339,7 @@ static struct soc15_allowed_register_entry soc15_allowed_read_registers[] = {
        { SOC15_REG_ENTRY(GC, 0, mmCP_CPF_BUSY_STAT)},
        { SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STALLED_STAT1)},
        { SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STATUS)},
+       { SOC15_REG_ENTRY(GC, 0, mmCP_CPC_BUSY_STAT)},
        { SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STALLED_STAT1)},
        { SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STATUS)},
        { SOC15_REG_ENTRY(GC, 0, mmGB_ADDR_CONFIG)},