lib: sbi_pmu: ensure update hpm counter before starting counting

When detecting features of PMU, the hpm counter may be written to some
value, this will cause some unexpected behavior in some cases. So ensure
the hpm counter is updated before starting the counter and the related
interrupt.

Signed-off-by: Haijiao Liu <haijiao.liu@sophgo.com>
Co-authored-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Samuel Holland <samuel@sholland.org>

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index e8bed49f3fdfff3d6c70d56d622b7846de86ffed..c52e8a2935627dea80a08e04137111bca9e5783c 100644 (file)
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -353,8 +353,11 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
        if (cidx >= num_hw_ctrs || cidx == 1)
                return SBI_EINVAL;
 
-       if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11)
-               goto skip_inhibit_update;
+       if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11) {
+               if (ival_update)
+                       pmu_ctr_write_hw(cidx, ival);
+               return 0;
+       }
 
        /*
         * Some of the hardware may not support mcountinhibit but perf stat
@@ -368,13 +371,12 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 
        if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
                pmu_ctr_enable_irq_hw(cidx);
+       if (ival_update)
+               pmu_ctr_write_hw(cidx, ival);
        if (pmu_dev && pmu_dev->hw_counter_enable_irq)
                pmu_dev->hw_counter_enable_irq(cidx);
-       csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
 
-skip_inhibit_update:
-       if (ival_update)
-               pmu_ctr_write_hw(cidx, ival);
+       csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
 
        return 0;
 }