i40e: Add basic support for I710 devices
authorStanislaw Grzeszczak <stanislaw.a.grzeszczak@intel.com>
Mon, 29 Aug 2022 11:59:46 +0000 (13:59 +0200)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Tue, 6 Sep 2022 19:49:00 +0000 (12:49 -0700)
Intel introduces a new line of 1G ethernet adapters with Device ID 0x0DD2

Signed-off-by: Stanislaw Grzeszczak <stanislaw.a.grzeszczak@intel.com>
Signed-off-by: Mateusz Palczewski <mateusz.palczewski@intel.com>
Tested-by: Gurucharan <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/i40e/i40e_common.c
drivers/net/ethernet/intel/i40e/i40e_devids.h
drivers/net/ethernet/intel/i40e/i40e_main.c

index 2819e26..4f01e2a 100644 (file)
@@ -27,6 +27,7 @@ i40e_status i40e_set_mac_type(struct i40e_hw *hw)
                case I40E_DEV_ID_QSFP_A:
                case I40E_DEV_ID_QSFP_B:
                case I40E_DEV_ID_QSFP_C:
+               case I40E_DEV_ID_1G_BASE_T_BC:
                case I40E_DEV_ID_5G_BASE_T_BC:
                case I40E_DEV_ID_10G_BASE_T:
                case I40E_DEV_ID_10G_BASE_T4:
@@ -4974,6 +4975,7 @@ i40e_status i40e_write_phy_register(struct i40e_hw *hw,
                status = i40e_write_phy_register_clause22(hw, reg, phy_addr,
                                                          value);
                break;
+       case I40E_DEV_ID_1G_BASE_T_BC:
        case I40E_DEV_ID_5G_BASE_T_BC:
        case I40E_DEV_ID_10G_BASE_T:
        case I40E_DEV_ID_10G_BASE_T4:
@@ -5012,6 +5014,7 @@ i40e_status i40e_read_phy_register(struct i40e_hw *hw,
                status = i40e_read_phy_register_clause22(hw, reg, phy_addr,
                                                         value);
                break;
+       case I40E_DEV_ID_1G_BASE_T_BC:
        case I40E_DEV_ID_5G_BASE_T_BC:
        case I40E_DEV_ID_10G_BASE_T:
        case I40E_DEV_ID_10G_BASE_T4:
index 2610338..d9c51a2 100644 (file)
 #define I40E_DEV_ID_10G_B              0x104F
 #define I40E_DEV_ID_10G_SFP            0x104E
 #define I40E_DEV_ID_5G_BASE_T_BC       0x101F
+#define I40E_DEV_ID_1G_BASE_T_BC       0x0DD2
 #define I40E_IS_X710TL_DEVICE(d) \
-       (((d) == I40E_DEV_ID_5G_BASE_T_BC) || \
+       (((d) == I40E_DEV_ID_1G_BASE_T_BC) || \
+        ((d) == I40E_DEV_ID_5G_BASE_T_BC) || \
         ((d) == I40E_DEV_ID_10G_BASE_T_BC))
 #define I40E_DEV_ID_KX_X722            0x37CE
 #define I40E_DEV_ID_QSFP_X722          0x37CF
index 5e52900..89dd461 100644 (file)
@@ -66,6 +66,7 @@ static const struct pci_device_id i40e_pci_tbl[] = {
        {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
        {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
        {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
+       {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_BC), 0},
        {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
        {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
        {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},