radv: Pass through render loop detection to internal layout decisions.

And do nothing with it yet.

Everything outside a renderpass has no render loop.

Reviewed-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 645e015..51186dc 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -54,7 +54,9 @@ enum {
 static void radv_handle_image_transition(struct radv_cmd_buffer *cmd_buffer,
                                         struct radv_image *image,
                                         VkImageLayout src_layout,
+                                        bool src_render_loop,
                                         VkImageLayout dst_layout,
+                                        bool dst_render_loop,
                                         uint32_t src_family,
                                         uint32_t dst_family,
                                         const VkImageSubresourceRange *range,
@@ -1285,13 +1287,14 @@ radv_emit_fb_color_state(struct radv_cmd_buffer *cmd_buffer,
                         int index,
                         struct radv_color_buffer_info *cb,
                         struct radv_image_view *iview,
-                        VkImageLayout layout)
+                        VkImageLayout layout,
+                        bool in_render_loop)
 {
        bool is_vi = cmd_buffer->device->physical_device->rad_info.chip_class >= GFX8;
        uint32_t cb_color_info = cb->cb_color_info;
        struct radv_image *image = iview->image;
 
-       if (!radv_layout_dcc_compressed(image, layout,
+       if (!radv_layout_dcc_compressed(image, layout, in_render_loop,
                                        radv_image_queue_family_mask(image,
                                                                     cmd_buffer->queue_family_index,
                                                                     cmd_buffer->queue_family_index))) {
@@ -1393,7 +1396,7 @@ static void
 radv_update_zrange_precision(struct radv_cmd_buffer *cmd_buffer,
                             struct radv_ds_buffer_info *ds,
                             struct radv_image *image, VkImageLayout layout,
-                            bool requires_cond_exec)
+                            bool in_render_loop, bool requires_cond_exec)
 {
        uint32_t db_z_info = ds->db_z_info;
        uint32_t db_z_info_reg;
@@ -1402,7 +1405,7 @@ radv_update_zrange_precision(struct radv_cmd_buffer *cmd_buffer,
            !radv_image_is_tc_compat_htile(image))
                return;
 
-       if (!radv_layout_has_htile(image, layout,
+       if (!radv_layout_has_htile(image, layout, in_render_loop,
                                   radv_image_queue_family_mask(image,
                                                                cmd_buffer->queue_family_index,
                                                                cmd_buffer->queue_family_index))) {
@@ -1439,12 +1442,13 @@ static void
 radv_emit_fb_ds_state(struct radv_cmd_buffer *cmd_buffer,
                      struct radv_ds_buffer_info *ds,
                      struct radv_image *image,
-                     VkImageLayout layout)
+                     VkImageLayout layout,
+                     bool in_render_loop)
 {
        uint32_t db_z_info = ds->db_z_info;
        uint32_t db_stencil_info = ds->db_stencil_info;
 
-       if (!radv_layout_has_htile(image, layout,
+       if (!radv_layout_has_htile(image, layout, in_render_loop,
                                   radv_image_queue_family_mask(image,
                                                                cmd_buffer->queue_family_index,
                                                                cmd_buffer->queue_family_index))) {
@@ -1512,7 +1516,7 @@ radv_emit_fb_ds_state(struct radv_cmd_buffer *cmd_buffer,
        }
 
        /* Update the ZRANGE_PRECISION value for the TC-compat bug. */
-       radv_update_zrange_precision(cmd_buffer, ds, image, layout, true);
+       radv_update_zrange_precision(cmd_buffer, ds, image, layout, in_render_loop, true);
 
        radeon_set_context_reg(cmd_buffer->cs, R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL,
                               ds->pa_su_poly_offset_db_fmt_cntl);
@@ -1552,9 +1556,10 @@ radv_update_bound_fast_clear_ds(struct radv_cmd_buffer *cmd_buffer,
        if ((aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
            ds_clear_value.depth == 0.0) {
                VkImageLayout layout = subpass->depth_stencil_attachment->layout;
+               bool in_render_loop = subpass->depth_stencil_attachment->in_render_loop;
 
                radv_update_zrange_precision(cmd_buffer, &cmd_buffer->state.attachments[att_idx].ds, image,
-                                            layout, false);
+                                            layout, in_render_loop, false);
        }
 
        cmd_buffer->state.context_roll_without_scissor_emitted = true;
@@ -1913,12 +1918,13 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer)
                int idx = subpass->color_attachments[i].attachment;
                struct radv_image_view *iview = cmd_buffer->state.attachments[idx].iview;
                VkImageLayout layout = subpass->color_attachments[i].layout;
+               bool in_render_loop = subpass->color_attachments[i].in_render_loop;
 
                radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, iview->bo);
 
                assert(iview->aspect_mask & (VK_IMAGE_ASPECT_COLOR_BIT | VK_IMAGE_ASPECT_PLANE_0_BIT |
                                                       VK_IMAGE_ASPECT_PLANE_1_BIT | VK_IMAGE_ASPECT_PLANE_2_BIT));
-               radv_emit_fb_color_state(cmd_buffer, i, &cmd_buffer->state.attachments[idx].cb, iview, layout);
+               radv_emit_fb_color_state(cmd_buffer, i, &cmd_buffer->state.attachments[idx].cb, iview, layout, in_render_loop);
 
                radv_load_color_clear_metadata(cmd_buffer, iview, i);
        }
@@ -1926,16 +1932,17 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer)
        if (subpass->depth_stencil_attachment) {
                int idx = subpass->depth_stencil_attachment->attachment;
                VkImageLayout layout = subpass->depth_stencil_attachment->layout;
+               bool in_render_loop = subpass->depth_stencil_attachment->in_render_loop;
                struct radv_image *image = cmd_buffer->state.attachments[idx].iview->image;
                radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, cmd_buffer->state.attachments[idx].iview->bo);
                ASSERTED uint32_t queue_mask = radv_image_queue_family_mask(image,
                                                                                cmd_buffer->queue_family_index,
                                                                                cmd_buffer->queue_family_index);
                /* We currently don't support writing decompressed HTILE */
-               assert(radv_layout_has_htile(image, layout, queue_mask) ==
-                      radv_layout_is_htile_compressed(image, layout, queue_mask));
+               assert(radv_layout_has_htile(image, layout, in_render_loop, queue_mask) ==
+                      radv_layout_is_htile_compressed(image, layout, in_render_loop, queue_mask));
 
-               radv_emit_fb_ds_state(cmd_buffer, &cmd_buffer->state.attachments[idx].ds, image, layout);
+               radv_emit_fb_ds_state(cmd_buffer, &cmd_buffer->state.attachments[idx].ds, image, layout, in_render_loop);
 
                if (cmd_buffer->state.attachments[idx].ds.offset_scale != cmd_buffer->state.offset_scale) {
                        cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
@@ -2905,9 +2912,12 @@ static void radv_handle_subpass_image_transition(struct radv_cmd_buffer *cmd_buf
        radv_handle_image_transition(cmd_buffer,
                                     view->image,
                                     cmd_buffer->state.attachments[idx].current_layout,
-                                    att.layout, 0, 0, &range, sample_locs);
+                                    cmd_buffer->state.attachments[idx].current_in_render_loop,
+                                    att.layout, att.in_render_loop,
+                                    0, 0, &range, sample_locs);
 
        cmd_buffer->state.attachments[idx].current_layout = att.layout;
+       cmd_buffer->state.attachments[idx].current_in_render_loop = att.in_render_loop;
 
 
 }
@@ -5066,7 +5076,9 @@ static void radv_initialize_htile(struct radv_cmd_buffer *cmd_buffer,
 static void radv_handle_depth_image_transition(struct radv_cmd_buffer *cmd_buffer,
                                               struct radv_image *image,
                                               VkImageLayout src_layout,
+                                              bool src_render_loop,
                                               VkImageLayout dst_layout,
+                                              bool dst_render_loop,
                                               unsigned src_queue_mask,
                                               unsigned dst_queue_mask,
                                               const VkImageSubresourceRange *range,
@@ -5078,18 +5090,18 @@ static void radv_handle_depth_image_transition(struct radv_cmd_buffer *cmd_buffe
        if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED) {
                uint32_t clear_value = vk_format_is_stencil(image->vk_format) ? 0xfffff30f : 0xfffc000f;
 
-               if (radv_layout_is_htile_compressed(image, dst_layout,
+               if (radv_layout_is_htile_compressed(image, dst_layout, dst_render_loop,
                                                    dst_queue_mask)) {
                        clear_value = 0;
                }
 
                radv_initialize_htile(cmd_buffer, image, range, clear_value);
-       } else if (!radv_layout_is_htile_compressed(image, src_layout, src_queue_mask) &&
-                  radv_layout_is_htile_compressed(image, dst_layout, dst_queue_mask)) {
+       } else if (!radv_layout_is_htile_compressed(image, src_layout, src_render_loop, src_queue_mask) &&
+                  radv_layout_is_htile_compressed(image, dst_layout, dst_render_loop, dst_queue_mask)) {
                uint32_t clear_value = vk_format_is_stencil(image->vk_format) ? 0xfffff30f : 0xfffc000f;
                radv_initialize_htile(cmd_buffer, image, range, clear_value);
-       } else if (radv_layout_is_htile_compressed(image, src_layout, src_queue_mask) &&
-                  !radv_layout_is_htile_compressed(image, dst_layout, dst_queue_mask)) {
+       } else if (radv_layout_is_htile_compressed(image, src_layout, src_render_loop, src_queue_mask) &&
+                  !radv_layout_is_htile_compressed(image, dst_layout, dst_render_loop, dst_queue_mask)) {
                VkImageSubresourceRange local_range = *range;
                local_range.aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT;
                local_range.baseMipLevel = 0;
@@ -5193,7 +5205,9 @@ void radv_initialize_dcc(struct radv_cmd_buffer *cmd_buffer,
 static void radv_init_color_image_metadata(struct radv_cmd_buffer *cmd_buffer,
                                           struct radv_image *image,
                                           VkImageLayout src_layout,
+                                          bool src_render_loop,
                                           VkImageLayout dst_layout,
+                                          bool dst_render_loop,
                                           unsigned src_queue_mask,
                                           unsigned dst_queue_mask,
                                           const VkImageSubresourceRange *range)
@@ -5218,6 +5232,7 @@ static void radv_init_color_image_metadata(struct radv_cmd_buffer *cmd_buffer,
                bool need_decompress_pass = false;
 
                if (radv_layout_dcc_compressed(image, dst_layout,
+                                              dst_render_loop,
                                               dst_queue_mask)) {
                        value = 0x20202020u;
                        need_decompress_pass = true;
@@ -5243,14 +5258,17 @@ static void radv_init_color_image_metadata(struct radv_cmd_buffer *cmd_buffer,
 static void radv_handle_color_image_transition(struct radv_cmd_buffer *cmd_buffer,
                                               struct radv_image *image,
                                               VkImageLayout src_layout,
+                                              bool src_render_loop,
                                               VkImageLayout dst_layout,
+                                              bool dst_render_loop,
                                               unsigned src_queue_mask,
                                               unsigned dst_queue_mask,
                                               const VkImageSubresourceRange *range)
 {
        if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED) {
                radv_init_color_image_metadata(cmd_buffer, image,
-                                              src_layout, dst_layout,
+                                              src_layout, src_render_loop,
+                                              dst_layout, dst_render_loop,
                                               src_queue_mask, dst_queue_mask,
                                               range);
                return;
@@ -5259,18 +5277,18 @@ static void radv_handle_color_image_transition(struct radv_cmd_buffer *cmd_buffe
        if (radv_dcc_enabled(image, range->baseMipLevel)) {
                if (src_layout == VK_IMAGE_LAYOUT_PREINITIALIZED) {
                        radv_initialize_dcc(cmd_buffer, image, range, 0xffffffffu);
-               } else if (radv_layout_dcc_compressed(image, src_layout, src_queue_mask) &&
-                          !radv_layout_dcc_compressed(image, dst_layout, dst_queue_mask)) {
+               } else if (radv_layout_dcc_compressed(image, src_layout, src_render_loop, src_queue_mask) &&
+                          !radv_layout_dcc_compressed(image, dst_layout, dst_render_loop, dst_queue_mask)) {
                        radv_decompress_dcc(cmd_buffer, image, range);
-               } else if (radv_layout_can_fast_clear(image, src_layout, src_queue_mask) &&
-                          !radv_layout_can_fast_clear(image, dst_layout, dst_queue_mask)) {
+               } else if (radv_layout_can_fast_clear(image, src_layout, src_render_loop, src_queue_mask) &&
+                          !radv_layout_can_fast_clear(image, dst_layout, dst_render_loop, dst_queue_mask)) {
                        radv_fast_clear_flush_image_inplace(cmd_buffer, image, range);
                }
        } else if (radv_image_has_cmask(image) || radv_image_has_fmask(image)) {
                bool fce_eliminate = false, fmask_expand = false;
 
-               if (radv_layout_can_fast_clear(image, src_layout, src_queue_mask) &&
-                   !radv_layout_can_fast_clear(image, dst_layout, dst_queue_mask)) {
+               if (radv_layout_can_fast_clear(image, src_layout, src_render_loop, src_queue_mask) &&
+                   !radv_layout_can_fast_clear(image, dst_layout, dst_render_loop, dst_queue_mask)) {
                        fce_eliminate = true;
                }
 
@@ -5295,7 +5313,9 @@ static void radv_handle_color_image_transition(struct radv_cmd_buffer *cmd_buffe
 static void radv_handle_image_transition(struct radv_cmd_buffer *cmd_buffer,
                                         struct radv_image *image,
                                         VkImageLayout src_layout,
+                                        bool src_render_loop,
                                         VkImageLayout dst_layout,
+                                        bool dst_render_loop,
                                         uint32_t src_family,
                                         uint32_t dst_family,
                                         const VkImageSubresourceRange *range,
@@ -5334,12 +5354,14 @@ static void radv_handle_image_transition(struct radv_cmd_buffer *cmd_buffer,
 
        if (vk_format_is_depth(image->vk_format)) {
                radv_handle_depth_image_transition(cmd_buffer, image,
-                                                  src_layout, dst_layout,
+                                                  src_layout, src_render_loop,
+                                                  dst_layout, dst_render_loop,
                                                   src_queue_mask, dst_queue_mask,
                                                   range, sample_locs);
        } else {
                radv_handle_color_image_transition(cmd_buffer, image,
-                                                  src_layout, dst_layout,
+                                                  src_layout, src_render_loop,
+                                                  dst_layout, dst_render_loop,
                                                   src_queue_mask, dst_queue_mask,
                                                   range);
        }
@@ -5436,7 +5458,9 @@ radv_barrier(struct radv_cmd_buffer *cmd_buffer,
 
                radv_handle_image_transition(cmd_buffer, image,
                                             pImageMemoryBarriers[i].oldLayout,
+                                            false, /* Outside of a renderpass we are never in a renderloop */
                                             pImageMemoryBarriers[i].newLayout,
+                                            false, /* Outside of a renderpass we are never in a renderloop */
                                             pImageMemoryBarriers[i].srcQueueFamilyIndex,
                                             pImageMemoryBarriers[i].dstQueueFamilyIndex,
                                             &pImageMemoryBarriers[i].subresourceRange,

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index efbb9de..8210754 100644 (file)
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -1597,6 +1597,7 @@ radv_image_view_init(struct radv_image_view *iview,
 
 bool radv_layout_has_htile(const struct radv_image *image,
                            VkImageLayout layout,
+                          bool in_render_loop,
                            unsigned queue_mask)
 {
        if (radv_image_is_tc_compat_htile(image))
@@ -1610,6 +1611,7 @@ bool radv_layout_has_htile(const struct radv_image *image,
 
 bool radv_layout_is_htile_compressed(const struct radv_image *image,
                                      VkImageLayout layout,
+                                    bool in_render_loop,
                                      unsigned queue_mask)
 {
        if (radv_image_is_tc_compat_htile(image))
@@ -1623,6 +1625,7 @@ bool radv_layout_is_htile_compressed(const struct radv_image *image,
 
 bool radv_layout_can_fast_clear(const struct radv_image *image,
                                VkImageLayout layout,
+                               bool in_render_loop,
                                unsigned queue_mask)
 {
        return layout == VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
@@ -1630,6 +1633,7 @@ bool radv_layout_can_fast_clear(const struct radv_image *image,
 
 bool radv_layout_dcc_compressed(const struct radv_image *image,
                                VkImageLayout layout,
+                               bool in_render_loop,
                                unsigned queue_mask)
 {
        /* Don't compress compute transfer dst, as image stores are not supported. */

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 37bfab3..6003fa5 100644 (file)
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -629,6 +629,7 @@ static bool depth_view_can_fast_clear(struct radv_cmd_buffer *cmd_buffer,
                                      const struct radv_image_view *iview,
                                      VkImageAspectFlags aspects,
                                      VkImageLayout layout,
+                                     bool in_render_loop,
                                      const VkClearRect *clear_rect,
                                      VkClearDepthStencilValue clear_value)
 {
@@ -651,7 +652,7 @@ static bool depth_view_can_fast_clear(struct radv_cmd_buffer *cmd_buffer,
            iview->base_mip == 0 &&
            iview->base_layer == 0 &&
            iview->layer_count == iview->image->info.array_size &&
-           radv_layout_is_htile_compressed(iview->image, layout, queue_mask) &&
+           radv_layout_is_htile_compressed(iview->image, layout, in_render_loop, queue_mask) &&
            radv_image_extent_compare(iview->image, &iview->extent))
                return true;
        return false;
@@ -664,10 +665,12 @@ pick_depthstencil_pipeline(struct radv_cmd_buffer *cmd_buffer,
                           int samples_log2,
                           VkImageAspectFlags aspects,
                           VkImageLayout layout,
+                          bool in_render_loop,
                           const VkClearRect *clear_rect,
                           VkClearDepthStencilValue clear_value)
 {
-       bool fast = depth_view_can_fast_clear(cmd_buffer, iview, aspects, layout, clear_rect, clear_value);
+       bool fast = depth_view_can_fast_clear(cmd_buffer, iview, aspects, layout,
+                                             in_render_loop, clear_rect, clear_value);
        int index = DEPTH_CLEAR_SLOW;
        VkPipeline *pipeline;
 
@@ -763,6 +766,7 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer,
                                                         samples_log2,
                                                         aspects,
                                                         ds_att->layout,
+                                                        ds_att->in_render_loop,
                                                         clear_rect,
                                                         clear_value);
        if (!pipeline)
@@ -780,7 +784,8 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer,
                             pipeline);
 
        if (depth_view_can_fast_clear(cmd_buffer, iview, aspects,
-                                     ds_att->layout, clear_rect, clear_value))
+                                     ds_att->layout, ds_att->in_render_loop,
+                                     clear_rect, clear_value))
                radv_update_ds_clear_metadata(cmd_buffer, iview->image,
                                              clear_value, aspects);
 
@@ -981,6 +986,7 @@ static bool
 radv_can_fast_clear_depth(struct radv_cmd_buffer *cmd_buffer,
                          const struct radv_image_view *iview,
                          VkImageLayout image_layout,
+                         bool in_render_loop,
                          VkImageAspectFlags aspects,
                          const VkClearRect *clear_rect,
                          const VkClearDepthStencilValue clear_value,
@@ -989,7 +995,10 @@ radv_can_fast_clear_depth(struct radv_cmd_buffer *cmd_buffer,
        if (!radv_image_view_can_fast_clear(cmd_buffer->device, iview))
                return false;
 
-       if (!radv_layout_is_htile_compressed(iview->image, image_layout, radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index, cmd_buffer->queue_family_index)))
+       if (!radv_layout_is_htile_compressed(iview->image, image_layout, in_render_loop,
+                                            radv_image_queue_family_mask(iview->image,
+                                                                         cmd_buffer->queue_family_index,
+                                                                         cmd_buffer->queue_family_index)))
                return false;
 
        if (clear_rect->rect.offset.x || clear_rect->rect.offset.y ||
@@ -1517,6 +1526,7 @@ static bool
 radv_can_fast_clear_color(struct radv_cmd_buffer *cmd_buffer,
                          const struct radv_image_view *iview,
                          VkImageLayout image_layout,
+                         bool in_render_loop,
                          const VkClearRect *clear_rect,
                          VkClearColorValue clear_value,
                          uint32_t view_mask)
@@ -1526,7 +1536,10 @@ radv_can_fast_clear_color(struct radv_cmd_buffer *cmd_buffer,
        if (!radv_image_view_can_fast_clear(cmd_buffer->device, iview))
                return false;
 
-       if (!radv_layout_can_fast_clear(iview->image, image_layout, radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index, cmd_buffer->queue_family_index)))
+       if (!radv_layout_can_fast_clear(iview->image, image_layout, in_render_loop,
+                                       radv_image_queue_family_mask(iview->image,
+                                                                    cmd_buffer->queue_family_index,
+                                                                    cmd_buffer->queue_family_index)))
                return false;
 
        if (clear_rect->rect.offset.x || clear_rect->rect.offset.y ||
@@ -1679,10 +1692,11 @@ emit_clear(struct radv_cmd_buffer *cmd_buffer,
                        return;
 
                VkImageLayout image_layout = subpass->color_attachments[subpass_att].layout;
+               bool in_render_loop = subpass->color_attachments[subpass_att].in_render_loop;
                const struct radv_image_view *iview = fb ? cmd_buffer->state.attachments[pass_att].iview : NULL;
                VkClearColorValue clear_value = clear_att->clearValue.color;
 
-               if (radv_can_fast_clear_color(cmd_buffer, iview, image_layout,
+               if (radv_can_fast_clear_color(cmd_buffer, iview, image_layout, in_render_loop,
                                              clear_rect, clear_value, view_mask)) {
                        radv_fast_clear_color(cmd_buffer, iview, clear_att,
                                              subpass_att, pre_flush,
@@ -1700,6 +1714,7 @@ emit_clear(struct radv_cmd_buffer *cmd_buffer,
                        return;
 
                VkImageLayout image_layout = ds_att->layout;
+               bool in_render_loop = ds_att->in_render_loop;
                const struct radv_image_view *iview = fb ? cmd_buffer->state.attachments[ds_att->attachment].iview : NULL;
                VkClearDepthStencilValue clear_value = clear_att->clearValue.depthStencil;
 
@@ -1707,8 +1722,8 @@ emit_clear(struct radv_cmd_buffer *cmd_buffer,
                                  VK_IMAGE_ASPECT_STENCIL_BIT));
 
                if (radv_can_fast_clear_depth(cmd_buffer, iview, image_layout,
-                                             aspects, clear_rect, clear_value,
-                                             view_mask)) {
+                                             in_render_loop, aspects, clear_rect,
+                                             clear_value, view_mask)) {
                        radv_fast_clear_depth(cmd_buffer, iview, clear_att,
                                              pre_flush, post_flush);
                } else {
@@ -1992,6 +2007,7 @@ radv_fast_clear_range(struct radv_cmd_buffer *cmd_buffer,
                      struct radv_image *image,
                      VkFormat format,
                      VkImageLayout image_layout,
+                     bool in_render_loop,
                      const VkImageSubresourceRange *range,
                      const VkClearValue *clear_val)
 {
@@ -2031,8 +2047,8 @@ radv_fast_clear_range(struct radv_cmd_buffer *cmd_buffer,
        };
 
        if (vk_format_is_color(format)) {
-               if (radv_can_fast_clear_color(cmd_buffer, &iview,
-                                             image_layout, &clear_rect,
+               if (radv_can_fast_clear_color(cmd_buffer, &iview, image_layout,
+                                             in_render_loop, &clear_rect,
                                              clear_att.clearValue.color, 0)) {
                        radv_fast_clear_color(cmd_buffer, &iview, &clear_att,
                                              clear_att.colorAttachment,
@@ -2041,8 +2057,9 @@ radv_fast_clear_range(struct radv_cmd_buffer *cmd_buffer,
                }
        } else {
                if (radv_can_fast_clear_depth(cmd_buffer, &iview, image_layout,
-                                             range->aspectMask, &clear_rect,
-                                             clear_att.clearValue.depthStencil, 0)) {
+                                             in_render_loop,range->aspectMask,
+                                             &clear_rect, clear_att.clearValue.depthStencil,
+                                             0)) {
                        radv_fast_clear_depth(cmd_buffer, &iview, &clear_att,
                                              NULL, NULL);
                        return true;
@@ -2092,7 +2109,7 @@ radv_cmd_clear_image(struct radv_cmd_buffer *cmd_buffer,
                 */
                if (!cs &&
                    radv_fast_clear_range(cmd_buffer, image, format,
-                                         image_layout, range,
+                                         image_layout, false, range,
                                          &internal_clear_value)) {
                        continue;
                }

diff --git a/src/amd/vulkan/radv_meta_copy.c b/src/amd/vulkan/radv_meta_copy.c
index 4d14d22..42e40cf 100644 (file)
--- a/src/amd/vulkan/radv_meta_copy.c
+++ b/src/amd/vulkan/radv_meta_copy.c
@@ -191,7 +191,7 @@ meta_copy_buffer_to_image(struct radv_cmd_buffer *cmd_buffer,
                        uint32_t queue_mask = radv_image_queue_family_mask(image,
                                                                           cmd_buffer->queue_family_index,
                                                                           cmd_buffer->queue_family_index);
-                       bool compressed = radv_layout_dcc_compressed(image, layout, queue_mask);
+                       bool compressed = radv_layout_dcc_compressed(image, layout, false, queue_mask);
                        if (compressed) {
                                radv_decompress_dcc(cmd_buffer, image, &(VkImageSubresourceRange) {
                                                                .aspectMask = pRegions[r].imageSubresource.aspectMask,
@@ -335,7 +335,7 @@ meta_copy_image_to_buffer(struct radv_cmd_buffer *cmd_buffer,
                        uint32_t queue_mask = radv_image_queue_family_mask(image,
                                                                           cmd_buffer->queue_family_index,
                                                                           cmd_buffer->queue_family_index);
-                       bool compressed = radv_layout_dcc_compressed(image, layout, queue_mask);
+                       bool compressed = radv_layout_dcc_compressed(image, layout, false, queue_mask);
                        if (compressed) {
                                radv_decompress_dcc(cmd_buffer, image, &(VkImageSubresourceRange) {
                                                                .aspectMask = pRegions[r].imageSubresource.aspectMask,
@@ -464,11 +464,11 @@ meta_copy_image(struct radv_cmd_buffer *cmd_buffer,
                        uint32_t dst_queue_mask = radv_image_queue_family_mask(dest_image,
                                                                               cmd_buffer->queue_family_index,
                                                                               cmd_buffer->queue_family_index);
-                       bool dst_compressed = radv_layout_dcc_compressed(dest_image, dest_image_layout, dst_queue_mask);
+                       bool dst_compressed = radv_layout_dcc_compressed(dest_image, dest_image_layout, false, dst_queue_mask);
                        uint32_t src_queue_mask = radv_image_queue_family_mask(src_image,
                                                                               cmd_buffer->queue_family_index,
                                                                               cmd_buffer->queue_family_index);
-                       bool src_compressed = radv_layout_dcc_compressed(src_image, src_image_layout, src_queue_mask);
+                       bool src_compressed = radv_layout_dcc_compressed(src_image, src_image_layout, false, src_queue_mask);
 
                        if (!src_compressed || radv_dcc_formats_compatible(b_src.format, b_dst.format)) {
                                b_src.format = b_dst.format;

diff --git a/src/amd/vulkan/radv_meta_resolve.c b/src/amd/vulkan/radv_meta_resolve.c
index e795720..063c48c 100644 (file)
--- a/src/amd/vulkan/radv_meta_resolve.c
+++ b/src/amd/vulkan/radv_meta_resolve.c
@@ -334,6 +334,7 @@ static void radv_pick_resolve_method_images(struct radv_image *src_image,
                                            VkFormat src_format,
                                            struct radv_image *dest_image,
                                            VkImageLayout dest_image_layout,
+                                           bool dest_render_loop,
                                            struct radv_cmd_buffer *cmd_buffer,
                                            enum radv_resolve_method *method)
 
@@ -352,7 +353,8 @@ static void radv_pick_resolve_method_images(struct radv_image *src_image,
                         dest_image->info.array_size > 1)
                        *method = RESOLVE_COMPUTE;
        
-               if (radv_layout_dcc_compressed(dest_image, dest_image_layout, queue_mask)) {
+               if (radv_layout_dcc_compressed(dest_image, dest_image_layout,
+                                              dest_render_loop, queue_mask)) {
                        *method = RESOLVE_FRAGMENT;
                } else if (dest_image->planes[0].surface.micro_tile_mode !=
                           src_image->planes[0].surface.micro_tile_mode) {
@@ -433,7 +435,7 @@ void radv_CmdResolveImage(
 
        radv_pick_resolve_method_images(src_image, src_image->vk_format,
                                        dest_image, dest_image_layout,
-                                       cmd_buffer, &resolve_method);
+                                       false, cmd_buffer, &resolve_method);
 
        if (resolve_method == RESOLVE_FRAGMENT) {
                radv_meta_resolve_fragment_image(cmd_buffer,
@@ -649,6 +651,7 @@ radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer)
                                                src_iview->vk_format,
                                                dst_iview->image,
                                                dst_att.layout,
+                                               dst_att.in_render_loop,
                                                cmd_buffer,
                                                &resolve_method);
 
@@ -700,6 +703,7 @@ radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer)
 
                radv_pick_resolve_method_images(src_img, src_iview->vk_format,
                                                dst_img, dest_att.layout,
+                                               dest_att.in_render_loop,
                                                cmd_buffer, &resolve_method);
 
                if (resolve_method == RESOLVE_FRAGMENT) {

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index ac5945c..2e7d697 100644 (file)
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1098,6 +1098,7 @@ struct radv_attachment_state {
        uint32_t                                     cleared_views;
        VkClearValue                                 clear_value;
        VkImageLayout                                current_layout;
+       bool                                         current_in_render_loop;
        struct radv_sample_locations_state           sample_location;
 
        union {
@@ -1665,6 +1666,7 @@ struct radv_image {
  * the image. */
 bool radv_layout_has_htile(const struct radv_image *image,
                            VkImageLayout layout,
+                           bool in_render_loop,
                            unsigned queue_mask);
 
 /* Whether the image has a htile  that is known consistent with the contents of
@@ -1675,14 +1677,17 @@ bool radv_layout_has_htile(const struct radv_image *image,
  */
 bool radv_layout_is_htile_compressed(const struct radv_image *image,
                                      VkImageLayout layout,
+                                     bool in_render_loop,
                                      unsigned queue_mask);
 
 bool radv_layout_can_fast_clear(const struct radv_image *image,
                                VkImageLayout layout,
+                               bool in_render_loop,
                                unsigned queue_mask);
 
 bool radv_layout_dcc_compressed(const struct radv_image *image,
                                VkImageLayout layout,
+                               bool in_render_loop,
                                unsigned queue_mask);
 
 /**