ARM: ls102xa: Setting device's stream id for SMMUs.

LS1 has 4 SMMUs for address translation of the masters. All the
SMMUs' stream IDs are 8-bit. The address translation depends on the
stream ID of the incoming transaction.
Each master has unique stream ID assigned to it and is configurable
through SCFG registers. The stream ID for the masters is identical
and share the same register field of STREAM ID registers.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h b/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h
new file mode 100644 (file)
index 0000000..abd70fc
--- /dev/null
+++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __FSL_LS102XA_STREAM_ID_H_
+#define __FSL_LS102XA_STREAM_ID_H_
+
+struct smmu_stream_id {
+       uint16_t offset;
+       uint16_t stream_id;
+       char dev_name[32];
+};
+
+void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num);
+#endif

diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 148fc41..14af660 100644 (file)
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -62,6 +62,8 @@ obj-$(CONFIG_IDT8T49N222A)    += idt8t49n222a_serdes_clk.o
 obj-$(CONFIG_ZM7300)           += zm7300.o
 obj-$(CONFIG_POWER_PFUZE100)   += pfuze.o
 
+obj-$(CONFIG_LS102XA_STREAM_ID)        += ls102xa_stream_id.o
+
 # deal with common files for P-series corenet based devices
 obj-$(CONFIG_P2041RDB) += p_corenet/
 obj-$(CONFIG_P3041DS)  += p_corenet/

diff --git a/board/freescale/common/ls102xa_stream_id.c b/board/freescale/common/ls102xa_stream_id.c
new file mode 100644 (file)
index 0000000..6154c9c
--- /dev/null
+++ b/board/freescale/common/ls102xa_stream_id.c
@@ -0,0 +1,18 @@
+/*
+ * Copyright 2014 Freescale Semiconductor
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/ls102xa_stream_id.h>
+
+void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num)
+{
+       uint32_t *scfg = (uint32_t *)CONFIG_SYS_FSL_SCFG_ADDR;
+       int i;
+
+       for (i = 0; i < num; i++)
+               out_be32(scfg + id[i].offset, id[i].stream_id);
+}

diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 1679144..f08e54f 100644 (file)
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ns_access.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
+#include <asm/arch/ls102xa_stream_id.h>
 #include <asm/pcie_layerscape.h>
 #include <hwconfig.h>
 #include <mmc.h>
@@ -449,6 +450,23 @@ static struct csu_ns_dev ns_dev[] = {
 };
 #endif
 
+struct smmu_stream_id dev_stream_id[] = {
+       { 0x100, 0x01, "ETSEC MAC1" },
+       { 0x104, 0x02, "ETSEC MAC2" },
+       { 0x108, 0x03, "ETSEC MAC3" },
+       { 0x10c, 0x04, "PEX1" },
+       { 0x110, 0x05, "PEX2" },
+       { 0x114, 0x06, "qDMA" },
+       { 0x118, 0x07, "SATA" },
+       { 0x11c, 0x08, "USB3" },
+       { 0x120, 0x09, "QE" },
+       { 0x124, 0x0a, "eSDHC" },
+       { 0x128, 0x0b, "eMA" },
+       { 0x14c, 0x0c, "2D-ACE" },
+       { 0x150, 0x0d, "USB2" },
+       { 0x18c, 0x0e, "DEBUG" },
+};
+
 int board_init(void)
 {
        struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
@@ -471,6 +489,9 @@ int board_init(void)
        config_serdes_mux();
 #endif
 
+       ls102xa_config_smmu_stream_id(dev_stream_id,
+                                     ARRAY_SIZE(dev_stream_id));
+
 #ifdef CONFIG_LS102XA_NS_ACCESS
        enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev));
 #endif

diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 0e61aba..8ab229d 100644 (file)
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ns_access.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
+#include <asm/arch/ls102xa_stream_id.h>
 #include <asm/pcie_layerscape.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
@@ -388,6 +389,23 @@ static struct csu_ns_dev ns_dev[] = {
 };
 #endif
 
+struct smmu_stream_id dev_stream_id[] = {
+       { 0x100, 0x01, "ETSEC MAC1" },
+       { 0x104, 0x02, "ETSEC MAC2" },
+       { 0x108, 0x03, "ETSEC MAC3" },
+       { 0x10c, 0x04, "PEX1" },
+       { 0x110, 0x05, "PEX2" },
+       { 0x114, 0x06, "qDMA" },
+       { 0x118, 0x07, "SATA" },
+       { 0x11c, 0x08, "USB3" },
+       { 0x120, 0x09, "QE" },
+       { 0x124, 0x0a, "eSDHC" },
+       { 0x128, 0x0b, "eMA" },
+       { 0x14c, 0x0c, "2D-ACE" },
+       { 0x150, 0x0d, "USB2" },
+       { 0x18c, 0x0e, "DEBUG" },
+};
+
 int board_init(void)
 {
        struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
@@ -407,6 +425,9 @@ int board_init(void)
 #endif
 #endif
 
+       ls102xa_config_smmu_stream_id(dev_stream_id,
+                                     ARRAY_SIZE(dev_stream_id));
+
 #ifdef CONFIG_LS102XA_NS_ACCESS
        enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev));
 #endif

diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 7391882..8dc04f2 100644 (file)
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -536,6 +536,8 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_SYS_LOAD_ADDR           0x82000000
 
+#define CONFIG_LS102XA_STREAM_ID
+
 /*
  * Stack sizes
  * The stack sizes are set up in start.S using the settings below

diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 171346b..66954d0 100644 (file)
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -352,6 +352,8 @@
 
 #define CONFIG_SYS_LOAD_ADDR           0x82000000
 
+#define CONFIG_LS102XA_STREAM_ID
+
 /*
  * Stack sizes
  * The stack sizes are set up in start.S using the settings below