x86/tdx: Exclude shared bit from __PHYSICAL_MASK
authorKirill A. Shutemov <kirill.shutemov@linux.intel.com>
Tue, 5 Apr 2022 23:29:14 +0000 (02:29 +0300)
committerDave Hansen <dave.hansen@linux.intel.com>
Thu, 7 Apr 2022 15:27:51 +0000 (08:27 -0700)
In TDX guests, by default memory is protected from host access. If a
guest needs to communicate with the VMM (like the I/O use case), it uses
a single bit in the physical address to communicate the protected/shared
attribute of the given page.

In the x86 ARCH code, __PHYSICAL_MASK macro represents the width of the
physical address in the given architecture. It is used in creating
physical PAGE_MASK for address bits in the kernel. Since in TDX guest,
a single bit is used as metadata, it needs to be excluded from valid
physical address bits to avoid using incorrect addresses bits in the
kernel.

Enable DYNAMIC_PHYSICAL_MASK to support updating the __PHYSICAL_MASK.

Co-developed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20220405232939.73860-6-kirill.shutemov@linux.intel.com
arch/x86/Kconfig
arch/x86/coco/tdx/tdx.c

index 984315c..aea4cc4 100644 (file)
@@ -883,6 +883,7 @@ config INTEL_TDX_GUEST
        depends on X86_64 && CPU_SUP_INTEL
        depends on X86_X2APIC
        select ARCH_HAS_CC_PLATFORM
+       select DYNAMIC_PHYSICAL_MASK
        help
          Support running as a guest under Intel TDX.  Without this support,
          the guest kernel can not boot or run under TDX.
index 96b2611..e84f6dd 100644 (file)
@@ -89,5 +89,13 @@ void __init tdx_early_init(void)
        cc_mask = get_cc_mask();
        cc_set_mask(cc_mask);
 
+       /*
+        * All bits above GPA width are reserved and kernel treats shared bit
+        * as flag, not as part of physical address.
+        *
+        * Adjust physical mask to only cover valid GPA bits.
+        */
+       physical_mask &= cc_mask - 1;
+
        pr_info("Guest detected\n");
 }