fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards
authorMatthew Gerlach <matthew.gerlach@linux.intel.com>
Tue, 19 Jul 2022 14:56:44 +0000 (07:56 -0700)
committerXu Yilun <yilun.xu@intel.com>
Mon, 15 Aug 2022 03:38:31 +0000 (11:38 +0800)
Add pci_dev_table entries supporting the Intel N6000, N6001
and C6100 cards to the dfl-pci driver.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Tested-by: Marco Pagani <marpagan@redhat.com>
Reviewed-by: Tom Rix <trix@redhat.com>
Acked-by: Wu Hao <hao.wu@intel.com>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20220719145644.242481-1-matthew.gerlach@linux.intel.com
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
drivers/fpga/dfl-pci.c

index fd1fa55..0914e73 100644 (file)
@@ -77,12 +77,18 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)
 #define PCIE_DEVICE_ID_INTEL_PAC_D5005         0x0B2B
 #define PCIE_DEVICE_ID_SILICOM_PAC_N5010       0x1000
 #define PCIE_DEVICE_ID_SILICOM_PAC_N5011       0x1001
+#define PCIE_DEVICE_ID_INTEL_DFL               0xbcce
+/* PCI Subdevice ID for PCIE_DEVICE_ID_INTEL_DFL */
+#define PCIE_SUBDEVICE_ID_INTEL_N6000          0x1770
+#define PCIE_SUBDEVICE_ID_INTEL_N6001          0x1771
+#define PCIE_SUBDEVICE_ID_INTEL_C6100          0x17d4
 
 /* VF Device */
 #define PCIE_DEVICE_ID_VF_INT_5_X              0xBCBF
 #define PCIE_DEVICE_ID_VF_INT_6_X              0xBCC1
 #define PCIE_DEVICE_ID_VF_DSC_1_X              0x09C5
 #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF      0x0B2C
+#define PCIE_DEVICE_ID_INTEL_DFL_VF            0xbccf
 
 static struct pci_device_id cci_pcie_id_tbl[] = {
        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),},
@@ -96,6 +102,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = {
        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),},
        {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),},
        {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),},
+       {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
+                       PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
+       {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
+                       PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
+       {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
+                       PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
+       {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
+                       PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
+       {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
+                       PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
+       {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
+                       PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
        {0,}
 };
 MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl);