constraints.md (Ts, Tv): New address constrains.
authorUros Bizjak <ubizjak@gmail.com>
Sat, 2 Nov 2013 11:32:53 +0000 (12:32 +0100)
committerUros Bizjak <uros@gcc.gnu.org>
Sat, 2 Nov 2013 11:32:53 +0000 (12:32 +0100)
* config/i386/constraints.md (Ts, Tv): New address constrains.
* config/i386/i386.md (*lea<mode>, *<mode>_<bndcheck>): Use Ts
constraint for address_no_seg_operand.
* config/i386/sse.md (*avx512pf_gatherpf<mode>_mask)
(*avx512pf_gatherpf<mode>, *avx512pf_scatterpf<mode>_mask)
(*avx512pf_scatterpf<mode>, *avx2_gathersi<mode>)
(*avx2_gathersi<mode>_2, *avx2_gatherdi<mode>, *avx2_gatherdi<mode>_2)
(*avx2_gatherdi<mode>_3, *avx2_gatherdi<mode>_4)
(*avx512f_gathersi<mode>, *avx512f_gathersi<mode>_2)
(*avx512f_gatherdi<mode>, *avx512f_gatherdi<mode>_2)
(*avx512f_scattersi<mode> *avx512f_scatterdi<mode>): Use Tv
constraint for vsib_address_operand.

From-SVN: r204317

gcc/ChangeLog
gcc/config/i386/constraints.md
gcc/config/i386/i386.md
gcc/config/i386/predicates.md
gcc/config/i386/sse.md

index 52b0aab..2399a61 100644 (file)
@@ -1,3 +1,18 @@
+2013-11-02  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/constraints.md (Ts, Tv): New address constrains.
+       * config/i386/i386.md (*lea<mode>, *<mode>_<bndcheck>): Use Ts
+       constraint for address_no_seg_operand.
+       * config/i386/sse.md (*avx512pf_gatherpf<mode>_mask)
+       (*avx512pf_gatherpf<mode>, *avx512pf_scatterpf<mode>_mask)
+       (*avx512pf_scatterpf<mode>, *avx2_gathersi<mode>)
+       (*avx2_gathersi<mode>_2, *avx2_gatherdi<mode>, *avx2_gatherdi<mode>_2)
+       (*avx2_gatherdi<mode>_3, *avx2_gatherdi<mode>_4)
+       (*avx512f_gathersi<mode>, *avx512f_gathersi<mode>_2)
+       (*avx512f_gatherdi<mode>, *avx512f_gatherdi<mode>_2)
+       (*avx512f_scattersi<mode> *avx512f_scatterdi<mode>): Use Tv
+       constraint for vsib_address_operand.
+
 2013-11-02  Steven Bosscher  <steven@gcc.gnu.org>
 
        * gcse.c (pre_delete): Remove references to regmove from comments.
index ddfd402..7289ae4 100644 (file)
   (match_operand 0 "x86_64_zext_immediate_operand"))
 
 ;; T prefix is used for different address constraints
+;;   v - VSIB address
+;;   s - address with no segment register
 ;;   i - address with no index and no rip
 ;;   b - address with no base and no rip
 
+(define_address_constraint "Tv"
+  "VSIB address operand"
+  (match_operand 0 "vsib_address_operand"))
+
+(define_address_constraint "Ts"
+  "Address operand without segment register"
+  (match_operand 0 "address_no_seg_operand"))
+
 (define_address_constraint "Ti"
   "MPX address operand without index"
   (match_operand 0 "address_mpx_no_index_operand"))
index 383bb97..c7ec0c1 100644 (file)
 
 (define_insn_and_split "*lea<mode>"
   [(set (match_operand:SWI48 0 "register_operand" "=r")
-       (match_operand:SWI48 1 "address_no_seg_operand" "p"))]
+       (match_operand:SWI48 1 "address_no_seg_operand" "Ts"))]
   ""
 {
   if (SImode_address_operand (operands[1], VOIDmode))
 
 (define_insn "*<mode>_<bndcheck>"
   [(parallel [(unspec [(match_operand:BND 0 "register_operand" "B")
-                       (match_operand:<bnd_ptr> 1 "address_no_seg_operand" "p")] BNDCHECK)
+                       (match_operand:<bnd_ptr> 1 "address_no_seg_operand" "Ts")] BNDCHECK)
               (set (match_operand:BLK 2 "bnd_mem_operator")
                    (unspec:BLK [(match_dup 2)] UNSPEC_MPX_FENCE))])]
   "TARGET_MPX"
index 6ecb871..e5dd90c 100644 (file)
   (ior (match_operand 0 "register_operand")
        (match_operand 0 "const0_operand")))
 
+;; Return true for RTX codes that force SImode address.
+(define_predicate "SImode_address_operand"
+  (match_code "subreg,zero_extend,and"))
+
 ;; Return true if op if a valid address for LEA, and does not contain
 ;; a segment override.  Defined as a special predicate to allow
 ;; mode-less const_int operands pass to address_operand.
   return parts.seg == SEG_DEFAULT;
 })
 
-;; Return true for RTX codes that force SImode address.
-(define_predicate "SImode_address_operand"
-  (match_code "subreg,zero_extend,and"))
-
 ;; Return true if op if a valid base register, displacement or
 ;; sum of base register and displacement for VSIB addressing.
 (define_predicate "vsib_address_operand"
index 9094a1c..7bb2d77 100644 (file)
      [(match_operand:<avx512fmaskmode> 0 "register_operand" "k")
       (match_operator:<ssescalarmode> 5 "vsib_mem_operator"
        [(unspec:P
-          [(match_operand:P 2 "vsib_address_operand" "p")
+          [(match_operand:P 2 "vsib_address_operand" "Tv")
            (match_operand:VI48_512 1 "register_operand" "v")
            (match_operand:SI 3 "const1248_operand" "n")]
           UNSPEC_VSIBADDR)])
      [(const_int -1)
       (match_operator:<ssescalarmode> 4 "vsib_mem_operator"
        [(unspec:P
-          [(match_operand:P 1 "vsib_address_operand" "p")
+          [(match_operand:P 1 "vsib_address_operand" "Tv")
            (match_operand:VI48_512 0 "register_operand" "v")
            (match_operand:SI 2 "const1248_operand" "n")]
           UNSPEC_VSIBADDR)])
      [(match_operand:<avx512fmaskmode> 0 "register_operand" "k")
       (match_operator:<ssescalarmode> 5 "vsib_mem_operator"
        [(unspec:P
-          [(match_operand:P 2 "vsib_address_operand" "p")
+          [(match_operand:P 2 "vsib_address_operand" "Tv")
            (match_operand:VI48_512 1 "register_operand" "v")
            (match_operand:SI 3 "const1248_operand" "n")]
           UNSPEC_VSIBADDR)])
      [(const_int -1)
       (match_operator:<ssescalarmode> 4 "vsib_mem_operator"
        [(unspec:P
-          [(match_operand:P 1 "vsib_address_operand" "p")
+          [(match_operand:P 1 "vsib_address_operand" "Tv")
            (match_operand:VI48_512 0 "register_operand" "v")
            (match_operand:SI 2 "const1248_operand" "n")]
           UNSPEC_VSIBADDR)])
          [(match_operand:VEC_GATHER_MODE 2 "register_operand" "0")
           (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
             [(unspec:P
-               [(match_operand:P 3 "vsib_address_operand" "p")
+               [(match_operand:P 3 "vsib_address_operand" "Tv")
                 (match_operand:<VEC_GATHER_IDXSI> 4 "register_operand" "x")
                 (match_operand:SI 6 "const1248_operand" "n")]
                UNSPEC_VSIBADDR)])
          [(pc)
           (match_operator:<ssescalarmode> 6 "vsib_mem_operator"
             [(unspec:P
-               [(match_operand:P 2 "vsib_address_operand" "p")
+               [(match_operand:P 2 "vsib_address_operand" "Tv")
                 (match_operand:<VEC_GATHER_IDXSI> 3 "register_operand" "x")
                 (match_operand:SI 5 "const1248_operand" "n")]
                UNSPEC_VSIBADDR)])
          [(match_operand:<VEC_GATHER_SRCDI> 2 "register_operand" "0")
           (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
             [(unspec:P
-               [(match_operand:P 3 "vsib_address_operand" "p")
+               [(match_operand:P 3 "vsib_address_operand" "Tv")
                 (match_operand:<VEC_GATHER_IDXDI> 4 "register_operand" "x")
                 (match_operand:SI 6 "const1248_operand" "n")]
                UNSPEC_VSIBADDR)])
          [(pc)
           (match_operator:<ssescalarmode> 6 "vsib_mem_operator"
             [(unspec:P
-               [(match_operand:P 2 "vsib_address_operand" "p")
+               [(match_operand:P 2 "vsib_address_operand" "Tv")
                 (match_operand:<VEC_GATHER_IDXDI> 3 "register_operand" "x")
                 (match_operand:SI 5 "const1248_operand" "n")]
                UNSPEC_VSIBADDR)])
            [(match_operand:<VEC_GATHER_SRCDI> 2 "register_operand" "0")
             (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
               [(unspec:P
-                 [(match_operand:P 3 "vsib_address_operand" "p")
+                 [(match_operand:P 3 "vsib_address_operand" "Tv")
                   (match_operand:<VEC_GATHER_IDXDI> 4 "register_operand" "x")
                   (match_operand:SI 6 "const1248_operand" "n")]
                  UNSPEC_VSIBADDR)])
            [(pc)
             (match_operator:<ssescalarmode> 6 "vsib_mem_operator"
               [(unspec:P
-                 [(match_operand:P 2 "vsib_address_operand" "p")
+                 [(match_operand:P 2 "vsib_address_operand" "Tv")
                   (match_operand:<VEC_GATHER_IDXDI> 3 "register_operand" "x")
                   (match_operand:SI 5 "const1248_operand" "n")]
                  UNSPEC_VSIBADDR)])
           (match_operand:<avx512fmaskmode> 7 "register_operand" "2")
           (match_operator:<ssescalarmode> 6 "vsib_mem_operator"
             [(unspec:P
-               [(match_operand:P 4 "vsib_address_operand" "p")
+               [(match_operand:P 4 "vsib_address_operand" "Tv")
                 (match_operand:<VEC_GATHER_IDXSI> 3 "register_operand" "v")
                 (match_operand:SI 5 "const1248_operand" "n")]
                UNSPEC_VSIBADDR)])]
           (match_operand:<avx512fmaskmode> 6 "register_operand" "1")
           (match_operator:<ssescalarmode> 5 "vsib_mem_operator"
             [(unspec:P
-               [(match_operand:P 3 "vsib_address_operand" "p")
+               [(match_operand:P 3 "vsib_address_operand" "Tv")
                 (match_operand:<VEC_GATHER_IDXSI> 2 "register_operand" "v")
                 (match_operand:SI 4 "const1248_operand" "n")]
                UNSPEC_VSIBADDR)])]
           (match_operand:QI 7 "register_operand" "2")
           (match_operator:<ssescalarmode> 6 "vsib_mem_operator"
             [(unspec:P
-               [(match_operand:P 4 "vsib_address_operand" "p")
+               [(match_operand:P 4 "vsib_address_operand" "Tv")
                 (match_operand:<VEC_GATHER_IDXDI> 3 "register_operand" "v")
                 (match_operand:SI 5 "const1248_operand" "n")]
                UNSPEC_VSIBADDR)])]
           (match_operand:QI 6 "register_operand" "1")
           (match_operator:<ssescalarmode> 5 "vsib_mem_operator"
             [(unspec:P
-               [(match_operand:P 3 "vsib_address_operand" "p")
+               [(match_operand:P 3 "vsib_address_operand" "Tv")
                 (match_operand:<VEC_GATHER_IDXDI> 2 "register_operand" "v")
                 (match_operand:SI 4 "const1248_operand" "n")]
                UNSPEC_VSIBADDR)])]
 (define_insn "*avx512f_scattersi<mode>"
   [(set (match_operator:VI48F_512 5 "vsib_mem_operator"
          [(unspec:P
-            [(match_operand:P 0 "vsib_address_operand" "p")
+            [(match_operand:P 0 "vsib_address_operand" "Tv")
              (match_operand:<VEC_GATHER_IDXSI> 2 "register_operand" "v")
              (match_operand:SI 4 "const1248_operand" "n")]
             UNSPEC_VSIBADDR)])
 (define_insn "*avx512f_scatterdi<mode>"
   [(set (match_operator:VI48F_512 5 "vsib_mem_operator"
          [(unspec:P
-            [(match_operand:P 0 "vsib_address_operand" "p")
+            [(match_operand:P 0 "vsib_address_operand" "Tv")
              (match_operand:V8DI 2 "register_operand" "v")
              (match_operand:SI 4 "const1248_operand" "n")]
             UNSPEC_VSIBADDR)])