s5pc210: slp7: dramsize is 1GiB

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/board/samsung/slp7_c210/slp7.c b/board/samsung/slp7_c210/slp7.c
index 2870b2f..8d84689 100644 (file)
--- a/board/samsung/slp7_c210/slp7.c
+++ b/board/samsung/slp7_c210/slp7.c
@@ -151,7 +151,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-       gd->ram_size = PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE;
+       gd->ram_size = PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE +
+                       PHYS_SDRAM_3_SIZE + PHYS_SDRAM_4_SIZE;
 
        /* Early init for i2c devices - Where these funcions should go?? */
 
@@ -170,8 +171,13 @@ void dram_init_banksize(void)
        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
        gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
        gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+       gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+       gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+       gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+       gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
 
-       gd->ram_size = gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size;
+       gd->ram_size = gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size +
+                       gd->bd->bi_dram[2].size + gd->bd->bi_dram[3].size;
 }
 
 static void check_auto_burn(void)

diff --git a/include/configs/s5pc210_slp7.h b/include/configs/s5pc210_slp7.h
index b324bf7..50afd4b 100644 (file)
--- a/include/configs/s5pc210_slp7.h
+++ b/include/configs/s5pc210_slp7.h
@@ -260,11 +260,15 @@
 #define CONFIG_STACKSIZE       (256 << 10)     /* regular stack 256KB */
 
 /* Universal has 2 banks of DRAM, but swap the bank */
-#define CONFIG_NR_DRAM_BANKS   2
+#define CONFIG_NR_DRAM_BANKS   4
 #define PHYS_SDRAM_1           CONFIG_SYS_SDRAM_BASE   /* LDDDR2 DMC 0 */
 #define PHYS_SDRAM_1_SIZE      (256 << 20)             /* 256 MB in CS 0 */
 #define PHYS_SDRAM_2           0x50000000              /* LPDDR2 DMC 1 */
 #define PHYS_SDRAM_2_SIZE      (256 << 20)             /* 256 MB in CS 0 */
+#define PHYS_SDRAM_3           0x60000000              /* LPDDR2 DMC 1 */
+#define PHYS_SDRAM_3_SIZE      (256 << 20)             /* 256 MB in CS 0 */
+#define PHYS_SDRAM_4           0x70000000              /* LPDDR2 DMC 1 */
+#define PHYS_SDRAM_4_SIZE      (256 << 20)             /* 256 MB in CS 0 */
 
 #define CONFIG_SYS_MEM_TOP_HIDE        (1 << 20)       /* 1MB for ram console */