Add Aarch64 SVE dwarf regnums
authorAlan Hayward <alan.hayward@arm.com>
Mon, 11 Jun 2018 09:24:20 +0000 (10:24 +0100)
committerAlan Hayward <alan.hayward@arm.com>
Mon, 11 Jun 2018 09:24:20 +0000 (10:24 +0100)
This is as per the spec:
https://developer.arm.com/products/architecture/a-profile/docs/100985/0000

gdb/
* aarch64-tdep.c (aarch64_dwarf_reg_to_regnum): Add mappings.
* aarch64-tdep.h (AARCH64_DWARF_SVE_VG): Add define.
(AARCH64_DWARF_SVE_FFR): Likewise.
(AARCH64_DWARF_SVE_P0): Likewise.
(AARCH64_DWARF_SVE_Z0): Likewise.

gdb/ChangeLog
gdb/aarch64-tdep.c
gdb/aarch64-tdep.h

index 3e51f87..635f025 100644 (file)
@@ -1,5 +1,13 @@
 2018-06-11  Alan Hayward  <alan.hayward@arm.com>
 
+       * aarch64-tdep.c (aarch64_dwarf_reg_to_regnum): Add mappings.
+       * aarch64-tdep.h (AARCH64_DWARF_SVE_VG): Add define.
+       (AARCH64_DWARF_SVE_FFR): Likewise.
+       (AARCH64_DWARF_SVE_P0): Likewise.
+       (AARCH64_DWARF_SVE_Z0): Likewise.
+
+2018-06-11  Alan Hayward  <alan.hayward@arm.com>
+
        * common/common-regcache.h (raw_compare): New function.
        * regcache.c (regcache::raw_compare): Likewise.
        * regcache.h (regcache::raw_compare): New declaration.
index 5380baa..5120fff 100644 (file)
@@ -1805,9 +1805,20 @@ aarch64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
   if (reg >= AARCH64_DWARF_V0 && reg <= AARCH64_DWARF_V0 + 31)
     return AARCH64_V0_REGNUM + reg - AARCH64_DWARF_V0;
 
+  if (reg == AARCH64_DWARF_SVE_VG)
+    return AARCH64_SVE_VG_REGNUM;
+
+  if (reg == AARCH64_DWARF_SVE_FFR)
+    return AARCH64_SVE_FFR_REGNUM;
+
+  if (reg >= AARCH64_DWARF_SVE_P0 && reg <= AARCH64_DWARF_SVE_P0 + 15)
+    return AARCH64_SVE_P0_REGNUM + reg - AARCH64_DWARF_SVE_P0;
+
+  if (reg >= AARCH64_DWARF_SVE_Z0 && reg <= AARCH64_DWARF_SVE_Z0 + 15)
+    return AARCH64_SVE_Z0_REGNUM + reg - AARCH64_DWARF_SVE_Z0;
+
   return -1;
 }
-\f
 
 /* Implement the "print_insn" gdbarch method.  */
 
index 5a31955..7e5031f 100644 (file)
@@ -32,6 +32,10 @@ struct regset;
 #define AARCH64_DWARF_X0   0
 #define AARCH64_DWARF_SP  31
 #define AARCH64_DWARF_V0  64
+#define AARCH64_DWARF_SVE_VG   46
+#define AARCH64_DWARF_SVE_FFR  47
+#define AARCH64_DWARF_SVE_P0   48
+#define AARCH64_DWARF_SVE_Z0   96
 
 /* Size of integer registers.  */
 #define X_REGISTER_SIZE  8