Revert "MIPS: Remove unused R4300 CPU support"
authorLauri Kasanen <cand@gmx.com>
Wed, 13 Jan 2021 15:10:07 +0000 (17:10 +0200)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Fri, 22 Jan 2021 10:39:45 +0000 (11:39 +0100)
This reverts commit f9065b54d437c4660e3d974ad9ce5188c068cd76.

We're adding Nintendo 64 support, so the VR4300 is no longer unused.

Signed-off-by: Lauri Kasanen <cand@gmx.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/Kconfig
arch/mips/Makefile
arch/mips/include/asm/cpu-type.h
arch/mips/include/asm/cpu.h
arch/mips/include/asm/vermagic.h
arch/mips/kernel/cpu-probe.c
arch/mips/kernel/idle.c
arch/mips/mm/c-r4k.c
arch/mips/mm/tlbex.c

index d3e64cc..fc37ec0 100644 (file)
@@ -1660,6 +1660,15 @@ config CPU_VR41XX
          kernel built with this option will not run on any other type of
          processor or vice versa.
 
+config CPU_R4300
+       bool "R4300"
+       depends on SYS_HAS_CPU_R4300
+       select CPU_SUPPORTS_32BIT_KERNEL
+       select CPU_SUPPORTS_64BIT_KERNEL
+       select CPU_HAS_LOAD_STORE_LR
+       help
+         MIPS Technologies R4300-series processors.
+
 config CPU_R4X00
        bool "R4x00"
        depends on SYS_HAS_CPU_R4X00
@@ -1994,6 +2003,9 @@ config SYS_HAS_CPU_TX39XX
 config SYS_HAS_CPU_VR41XX
        bool
 
+config SYS_HAS_CPU_R4300
+       bool
+
 config SYS_HAS_CPU_R4X00
        bool
 
index 5ffdd67..18d6afe 100644 (file)
@@ -160,6 +160,7 @@ cflags-y += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
 #
 cflags-$(CONFIG_CPU_R3000)     += -march=r3000
 cflags-$(CONFIG_CPU_TX39XX)    += -march=r3900
+cflags-$(CONFIG_CPU_R4300)     += -march=r4300 -Wa,--trap
 cflags-$(CONFIG_CPU_VR41XX)    += -march=r4100 -Wa,--trap
 cflags-$(CONFIG_CPU_R4X00)     += -march=r4600 -Wa,--trap
 cflags-$(CONFIG_CPU_TX49XX)    += -march=r4600 -Wa,--trap
index 3288cef..2be5d7b 100644 (file)
@@ -122,6 +122,11 @@ static inline int __pure __get_cpu_type(const int cpu_type)
        case CPU_VR4181A:
 #endif
 
+#ifdef CONFIG_SYS_HAS_CPU_R4300
+       case CPU_R4300:
+       case CPU_R4310:
+#endif
+
 #ifdef CONFIG_SYS_HAS_CPU_R4X00
        case CPU_R4000PC:
        case CPU_R4000SC:
index c9222cc..9e6211e 100644 (file)
@@ -302,7 +302,7 @@ enum cpu_type_enum {
        /*
         * R4000 class processors
         */
-       CPU_R4000PC, CPU_R4000SC, CPU_R4000MC, CPU_R4200,
+       CPU_R4000PC, CPU_R4000SC, CPU_R4000MC, CPU_R4200, CPU_R4300, CPU_R4310,
        CPU_R4400PC, CPU_R4400SC, CPU_R4400MC, CPU_R4600, CPU_R4640, CPU_R4650,
        CPU_R4700, CPU_R5000, CPU_R5500, CPU_NEVADA, CPU_R10000,
        CPU_R12000, CPU_R14000, CPU_R16000, CPU_VR41XX, CPU_VR4111, CPU_VR4121,
index 4d2dae0..371c187 100644 (file)
@@ -26,6 +26,8 @@
 #define MODULE_PROC_FAMILY "TX39XX "
 #elif defined CONFIG_CPU_VR41XX
 #define MODULE_PROC_FAMILY "VR41XX "
+#elif defined CONFIG_CPU_R4300
+#define MODULE_PROC_FAMILY "R4300 "
 #elif defined CONFIG_CPU_R4X00
 #define MODULE_PROC_FAMILY "R4X00 "
 #elif defined CONFIG_CPU_TX49XX
index 31cb919..9a89637 100644 (file)
@@ -1154,6 +1154,15 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
                        break;
                }
                break;
+       case PRID_IMP_R4300:
+               c->cputype = CPU_R4300;
+               __cpu_name[cpu] = "R4300";
+               set_isa(c, MIPS_CPU_ISA_III);
+               c->fpu_msk31 |= FPU_CSR_CONDX;
+               c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
+                            MIPS_CPU_LLSC;
+               c->tlbsize = 32;
+               break;
        case PRID_IMP_R4600:
                c->cputype = CPU_R4600;
                __cpu_name[cpu] = "R4600";
index 18e69eb..1aca3b4 100644 (file)
@@ -151,6 +151,7 @@ void __init check_wait(void)
                cpu_wait = r39xx_wait;
                break;
        case CPU_R4200:
+/*     case CPU_R4300: */
        case CPU_R4600:
        case CPU_R4640:
        case CPU_R4650:
index f67297b..7b23962 100644 (file)
@@ -1164,6 +1164,7 @@ static void probe_pcache(void)
        case CPU_R4400PC:
        case CPU_R4400SC:
        case CPU_R4400MC:
+       case CPU_R4300:
                icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
                c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
                c->icache.ways = 1;
index a7521b8..0fb1db8 100644 (file)
@@ -549,6 +549,7 @@ void build_tlb_write_entry(u32 **p, struct uasm_label **l,
                tlbw(p);
                break;
 
+       case CPU_R4300:
        case CPU_5KC:
        case CPU_TX49XX:
        case CPU_PR4450: