[X86] Swap the itineraries on the memory and register forms of CVTDQ2PD.
authorCraig Topper <craig.topper@intel.com>
Mon, 26 Mar 2018 02:17:13 +0000 (02:17 +0000)
committerCraig Topper <craig.topper@intel.com>
Mon, 26 Mar 2018 02:17:13 +0000 (02:17 +0000)
They were backwards.

llvm-svn: 328469

llvm/lib/Target/X86/X86InstrSSE.td
llvm/test/CodeGen/X86/sse2-schedule.ll

index 2ec2f90..99915e7 100644 (file)
@@ -2040,12 +2040,12 @@ def CVTDQ2PDrm  : S2SI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src),
                        "cvtdq2pd\t{$src, $dst|$dst, $src}",
                        [(set VR128:$dst,
                          (v2f64 (X86VSintToFP (bc_v4i32 (loadv2i64 addr:$src)))))],
-                       IIC_SSE_CVT_PD_RR>, Sched<[WriteCvtI2FLd]>;
+                       IIC_SSE_CVT_PD_RM>, Sched<[WriteCvtI2FLd]>;
 def CVTDQ2PDrr  : S2SI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
                        "cvtdq2pd\t{$src, $dst|$dst, $src}",
                        [(set VR128:$dst,
                          (v2f64 (X86VSintToFP (v4i32 VR128:$src))))],
-                       IIC_SSE_CVT_PD_RM>, Sched<[WriteCvtI2F]>;
+                       IIC_SSE_CVT_PD_RR>, Sched<[WriteCvtI2F]>;
 
 // AVX register conversion intrinsics
 let Predicates = [HasAVX, NoVLX] in {
index db6d7a5..7174b87 100644 (file)
@@ -1090,9 +1090,10 @@ define <2 x double> @test_cvtdq2pd(<4 x i32> %a0, <4 x i32> *%a1) {
 ;
 ; ATOM-LABEL: test_cvtdq2pd:
 ; ATOM:       # %bb.0:
-; ATOM-NEXT:    cvtdq2pd %xmm0, %xmm1 # sched: [8:4.00]
-; ATOM-NEXT:    cvtdq2pd (%rdi), %xmm0 # sched: [7:3.50]
-; ATOM-NEXT:    addpd %xmm1, %xmm0 # sched: [6:3.00]
+; ATOM-NEXT:    cvtdq2pd (%rdi), %xmm1 # sched: [8:4.00]
+; ATOM-NEXT:    cvtdq2pd %xmm0, %xmm0 # sched: [7:3.50]
+; ATOM-NEXT:    addpd %xmm0, %xmm1 # sched: [6:3.00]
+; ATOM-NEXT:    movapd %xmm1, %xmm0 # sched: [1:0.50]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;
 ; SLM-LABEL: test_cvtdq2pd: