Make ARMv8-M GAS tests pass on non ELF targets
authorThomas Preud'homme <thomas.preudhomme@arm.com>
Tue, 17 May 2016 15:35:12 +0000 (16:35 +0100)
committerThomas Preud'homme <thomas.preudhomme@arm.com>
Tue, 17 May 2016 15:38:11 +0000 (16:38 +0100)
2016-05-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>

gas/
* testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when
disassembling and stop skipping targets.
* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
* testsuite/gas/arm/archv8m-base.d: Also allow nops after the last
instruction for targets that have stronger alignment requirement.
* testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
* testsuite/gas/arm/archv8m-main.d: Likewise.
* testsuite/gas/arm/archv8m.s: Add label.
* testsuite/gas/arm/archv8m-cmse.s: Likewise.
* testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
* testsuite/gas/arm/archv8m-cmse-main.s: Likewise.

16 files changed:
gas/ChangeLog
gas/testsuite/gas/arm/archv8m-base.d
gas/testsuite/gas/arm/archv8m-cmse-base.d
gas/testsuite/gas/arm/archv8m-cmse-main-1.d
gas/testsuite/gas/arm/archv8m-cmse-main-2.d
gas/testsuite/gas/arm/archv8m-cmse-main.s
gas/testsuite/gas/arm/archv8m-cmse-msr-base.d
gas/testsuite/gas/arm/archv8m-cmse-msr-main.d
gas/testsuite/gas/arm/archv8m-cmse-msr.s
gas/testsuite/gas/arm/archv8m-cmse.s
gas/testsuite/gas/arm/archv8m-main-dsp-1.d
gas/testsuite/gas/arm/archv8m-main-dsp-2.d
gas/testsuite/gas/arm/archv8m-main-dsp-3.d
gas/testsuite/gas/arm/archv8m-main-dsp-4.d
gas/testsuite/gas/arm/archv8m-main.d
gas/testsuite/gas/arm/archv8m.s

index eea0f8b..745c13c 100644 (file)
@@ -1,3 +1,23 @@
+2016-05-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when
+       disassembling and stop skipping targets.
+       * testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+       * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+       * testsuite/gas/arm/archv8m-base.d: Also allow nops after the last
+       instruction for targets that have stronger alignment requirement.
+       * testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
+       * testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
+       * testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
+       * testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
+       * testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
+       * testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
+       * testsuite/gas/arm/archv8m-main.d: Likewise.
+       * testsuite/gas/arm/archv8m.s: Add label.
+       * testsuite/gas/arm/archv8m-cmse.s: Likewise.
+       * testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
+       * testsuite/gas/arm/archv8m-cmse-main.s: Likewise.
+
 2016-05-16  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 
        * config/tc-m32r.c (mach_table): Make static and const.
index 60df240..6a2ee87 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARM V8-M baseline instructions
 #source: archv8m.s
 #as: -march=armv8-m.base
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-pe *-wince-* *-*-coff
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -46,3 +45,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e8c2 1fe0         stlex   r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fc0         stlexb  r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fd0         stlexh  r0, r1, \[r2\]
+#...
index ba6ff3a..2357637 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Baseline Security Extensions instructions
 #source: archv8m-cmse.s
 #as: -march=armv8-m.base
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -16,3 +15,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e849 f880         tta     r8, r9
 0+.* <[^>]*> e841 f0c0         ttat    r0, r1
 0+.* <[^>]*> e849 f8c0         ttat    r8, r9
+#...
index f4937df..edb3982 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Mainline Security Extensions instructions (1)
 #source: archv8m-cmse.s
 #as: -march=armv8-m.main
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -16,3 +15,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e849 f880         tta     r8, r9
 0+.* <[^>]*> e841 f0c0         ttat    r0, r1
 0+.* <[^>]*> e849 f8c0         ttat    r8, r9
+#...
index 0aa67e4..bf37ecc 100644 (file)
@@ -1,11 +1,11 @@
 #name: ARMv8-M Mainline Security Extensions instructions (2)
 #source: archv8m-cmse-main.s
 #as: -march=armv8-m.main
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
 Disassembly of section .text:
 0+.* <[^>]*> ec31 0a00         vlldm   r1
 0+.* <[^>]*> ec22 0a00         vlstm   r2
+#...
index ded24ef..4bbb82d 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Baseline Security Extensions MSR/MRS instructions
 #source: archv8m-cmse-msr.s
 #as: -march=armv8-m.base
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
index df53150..30a3361 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Mainline Security Extensions MSR/MRS instructions
 #source: archv8m-cmse-msr.s
 #as: -march=armv8-m.main
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
index 4a61761..897be1a 100644 (file)
@@ -1,3 +1,4 @@
+T:
 msr   MSP, r0
 msr   MSP_S, r0
 msr   MSP_NS, r0
index 520550c..cac82c5 100644 (file)
@@ -1,6 +1,7 @@
 .thumb
 .syntax unified
 
+T:
 sg
 blxns r4
 blxns r9
index 17714b8..c8f9d7b 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Mainline with DSP instructions (base)
 #source: archv8m.s
 #as: -march=armv8-m.main+dsp
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -46,3 +45,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e8c2 1fe0         stlex   r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fc0         stlexb  r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fd0         stlexh  r0, r1, \[r2\]
+#...
index 7730a03..59b860a 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Mainline with DSP instructions (Security Extensions 1)
 #source: archv8m-cmse.s
 #as: -march=armv8-m.main+dsp
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -16,3 +15,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e849 f880         tta     r8, r9
 0+.* <[^>]*> e841 f0c0         ttat    r0, r1
 0+.* <[^>]*> e849 f8c0         ttat    r8, r9
+#...
index fdd9c78..5ac1ddf 100644 (file)
@@ -1,11 +1,11 @@
 #name: ARMv8-M Mainline with DSP instructions (Security Extensions 2)
 #source: archv8m-cmse-main.s
 #as: -march=armv8-m.main+dsp
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
 Disassembly of section .text:
 0+.* <[^>]*> ec31 0a00         vlldm   r1
 0+.* <[^>]*> ec22 0a00         vlstm   r2
+#...
index 1bb19ea..248f75e 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARMv8-M Mainline with DSP instructions (Security Extensions 3)
 #source: archv8m-cmse-msr.s
 #as: -march=armv8-m.main+dsp
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
index 055721a..a0c40e9 100644 (file)
@@ -1,8 +1,7 @@
 #name: ARM V8-M mainline instructions
 #source: archv8m.s
 #as: -march=armv8-m.main
-#objdump: -dr --prefix-addresses --show-raw-insn
-#skip: *-*-pe *-wince-* *-*-coff
+#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
 
 .*: +file format .*arm.*
 
@@ -46,3 +45,4 @@ Disassembly of section .text:
 0+.* <[^>]*> e8c2 1fe0         stlex   r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fc0         stlexb  r0, r1, \[r2\]
 0+.* <[^>]*> e8c2 1fd0         stlexh  r0, r1, \[r2\]
+#...
index 8aca8ba..5f8aafe 100644 (file)
@@ -1,6 +1,7 @@
 .thumb
 .syntax unified
 
+T:
 blx r4
 blx r9
 bx  r4