Do this if the truncate is free and the select is legal.
llvm-svn: 212640
}
}
+ // trunc (select c, a, b) -> select c, (trunc a), (trunc b)
+ if (N0.getOpcode() == ISD::SELECT) {
+ EVT SrcVT = N0.getValueType();
+ if ((!LegalOperations || TLI.isOperationLegal(ISD::SELECT, SrcVT)) &&
+ TLI.isTruncateFree(SrcVT, VT)) {
+ SDLoc SL(N0);
+ SDValue TruncOp0 = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(1));
+ SDValue TruncOp1 = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(2));
+ EVT SetCCVT = getSetCCResultType(VT);
+ SDValue Cond = DAG.getSExtOrTrunc(N0.getOperand(0), SL, SetCCVT);
+ return DAG.getNode(ISD::SELECT, SDLoc(N), VT, Cond, TruncOp0, TruncOp1);
+ }
+ }
+
// Fold a series of buildvector, bitcast, and truncate if possible.
// For example fold
// (2xi32 trunc (bitcast ((4xi32)buildvector x, x, y, y) 2xi64)) to
store i64 %1, i64 addrspace(1)* %out
ret void
}
+
+; CHECK-LABEL: @select_trunc_i64
+; CHECK: V_CNDMASK_B32
+; CHECK-NOT: V_CNDMASK_B32
+define void @select_trunc_i64(i32 addrspace(1)* %out, i32 %cond, i64 %in) nounwind {
+ %cmp = icmp ugt i32 %cond, 5
+ %sel = select i1 %cmp, i64 0, i64 %in
+ %trunc = trunc i64 %sel to i32
+ store i32 %trunc, i32 addrspace(1)* %out, align 4
+ ret void
+}
+
+; CHECK-LABEL: @select_trunc_i64_2
+; CHECK: V_CNDMASK_B32
+; CHECK-NOT: V_CNDMASK_B32
+define void @select_trunc_i64_2(i32 addrspace(1)* %out, i32 %cond, i64 %a, i64 %b) nounwind {
+ %cmp = icmp ugt i32 %cond, 5
+ %sel = select i1 %cmp, i64 %a, i64 %b
+ %trunc = trunc i64 %sel to i32
+ store i32 %trunc, i32 addrspace(1)* %out, align 4
+ ret void
+}
+
+; CHECK-LABEL: @v_select_trunc_i64_2
+; CHECK: V_CNDMASK_B32
+; CHECK-NOT: V_CNDMASK_B32
+define void @v_select_trunc_i64_2(i32 addrspace(1)* %out, i32 %cond, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
+ %cmp = icmp ugt i32 %cond, 5
+ %a = load i64 addrspace(1)* %aptr, align 8
+ %b = load i64 addrspace(1)* %bptr, align 8
+ %sel = select i1 %cmp, i64 %a, i64 %b
+ %trunc = trunc i64 %sel to i32
+ store i32 %trunc, i32 addrspace(1)* %out, align 4
+ ret void
+}
-; RUN: llc < %s -march=x86-64 | grep shrdq
+; RUN: llc -march=x86-64 < %s | FileCheck %s
; PR4736
%0 = type { i32, i8, [35 x i8] }
@g_144 = external global %0, align 8 ; <%0*> [#uses=1]
-define i32 @int87(i32 %uint64p_8) nounwind {
+; CHECK: shrdq
+
+define i32 @int87(i32 %uint64p_8, i1 %cond) nounwind {
entry:
%srcval4 = load i320* bitcast (%0* @g_144 to i320*), align 8 ; <i320> [#uses=1]
br label %for.cond
for.cond: ; preds = %for.cond, %entry
- %call3.in.in.in.v = select i1 undef, i320 192, i320 128 ; <i320> [#uses=1]
+ %call3.in.in.in.v = select i1 %cond, i320 192, i320 128 ; <i320> [#uses=1]
%call3.in.in.in = lshr i320 %srcval4, %call3.in.in.in.v ; <i320> [#uses=1]
%call3.in = trunc i320 %call3.in.in.in to i32 ; <i32> [#uses=1]
%tobool = icmp eq i32 %call3.in, 0 ; <i1> [#uses=1]