phy: qcom-qmp-usb: drop start and pwrdn-ctrl abstraction
authorJohan Hovold <johan+linaro@kernel.org>
Wed, 12 Oct 2022 08:50:02 +0000 (10:50 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 31 Dec 2022 12:32:47 +0000 (13:32 +0100)
[ Upstream commit 47b009db545ae90f0b50149029a6b8137685f524 ]

Drop the start and pwrdn-ctrl abstractions which are no longer needed
since the QMP driver split.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221012085002.24099-20-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Stable-dep-of: 922adfd59efd ("phy: qcom-qmp-usb: correct registers layout for IPQ8074 USB3 PHY")
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-usb.c

index a551ef4..868511b 100644 (file)
@@ -1456,9 +1456,6 @@ struct qmp_phy_cfg {
        /* array of registers with different offsets */
        const unsigned int *regs;
 
-       unsigned int start_ctrl;
-       unsigned int pwrdn_ctrl;
-
        /* true, if PHY needs delay after POWER_DOWN */
        bool has_pwrdn_delay;
 
@@ -1612,9 +1609,6 @@ static const struct qmp_phy_cfg ipq8074_usb3phy_cfg = {
        .vreg_list              = qmp_phy_vreg_l,
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
        .regs                   = usb3phy_regs_layout,
-
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
 };
 
 static const struct qmp_phy_cfg msm8996_usb3phy_cfg = {
@@ -1635,9 +1629,6 @@ static const struct qmp_phy_cfg msm8996_usb3phy_cfg = {
        .vreg_list              = qmp_phy_vreg_l,
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
        .regs                   = usb3phy_regs_layout,
-
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
 };
 
 static const struct qmp_phy_cfg qmp_v3_usb3phy_cfg = {
@@ -1659,9 +1650,6 @@ static const struct qmp_phy_cfg qmp_v3_usb3phy_cfg = {
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
        .regs                   = qmp_v3_usb3phy_regs_layout,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
        .has_phy_dp_com_ctrl    = true,
 };
@@ -1685,9 +1673,6 @@ static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
        .regs                   = qmp_v3_usb3phy_regs_layout,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
        .has_phy_dp_com_ctrl    = true,
 };
@@ -1710,9 +1695,6 @@ static const struct qmp_phy_cfg sc8280xp_usb3_uniphy_cfg = {
        .vreg_list              = qmp_phy_vreg_l,
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
        .regs                   = qmp_v4_usb3phy_regs_layout,
-
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
 };
 
 static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = {
@@ -1734,9 +1716,6 @@ static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = {
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
        .regs                   = qmp_v3_usb3phy_regs_layout,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
 };
 
@@ -1758,9 +1737,6 @@ static const struct qmp_phy_cfg msm8998_usb3phy_cfg = {
        .vreg_list              = qmp_phy_vreg_l,
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
        .regs                   = qmp_v3_usb3phy_regs_layout,
-
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
 };
 
 static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
@@ -1785,9 +1761,6 @@ static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
        .pcs_usb_offset         = 0x300,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
        .has_phy_dp_com_ctrl    = true,
 };
@@ -1814,9 +1787,6 @@ static const struct qmp_phy_cfg sm8150_usb3_uniphy_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
        .pcs_usb_offset         = 0x600,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
 };
 
@@ -1842,9 +1812,6 @@ static const struct qmp_phy_cfg sm8250_usb3phy_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
        .pcs_usb_offset         = 0x300,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
        .has_phy_dp_com_ctrl    = true,
 };
@@ -1871,9 +1838,6 @@ static const struct qmp_phy_cfg sm8250_usb3_uniphy_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
        .pcs_usb_offset         = 0x600,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
 };
 
@@ -1899,9 +1863,6 @@ static const struct qmp_phy_cfg sdx55_usb3_uniphy_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
        .pcs_usb_offset         = 0x600,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
 };
 
@@ -1927,9 +1888,6 @@ static const struct qmp_phy_cfg sdx65_usb3_uniphy_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
        .pcs_usb_offset         = 0x1000,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
 };
 
@@ -1955,9 +1913,6 @@ static const struct qmp_phy_cfg sm8350_usb3phy_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
        .pcs_usb_offset         = 0x300,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
        .has_phy_dp_com_ctrl    = true,
 };
@@ -1984,9 +1939,6 @@ static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
        .pcs_usb_offset         = 0x1000,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
 };
 
@@ -2008,9 +1960,6 @@ static const struct qmp_phy_cfg qcm2290_usb3phy_cfg = {
        .vreg_list              = qmp_phy_vreg_l,
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
        .regs                   = qcm2290_usb3phy_regs_layout,
-
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
 };
 
 static void qmp_usb_configure_lane(void __iomem *base,
@@ -2111,8 +2060,7 @@ static int qmp_usb_init(struct phy *phy)
                qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);
        }
 
-       qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
-                       cfg->pwrdn_ctrl);
+       qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN);
 
        return 0;
 
@@ -2184,7 +2132,7 @@ static int qmp_usb_power_on(struct phy *phy)
        qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
 
        /* start SerDes and Phy-Coding-Sublayer */
-       qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
+       qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], SERDES_START | PCS_START);
 
        status = pcs + cfg->regs[QPHY_PCS_STATUS];
        ret = readl_poll_timeout(status, val, !(val & PHYSTATUS), 10,
@@ -2213,11 +2161,12 @@ static int qmp_usb_power_off(struct phy *phy)
        qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
 
        /* stop SerDes and Phy-Coding-Sublayer */
-       qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
+       qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL],
+                       SERDES_START | PCS_START);
 
        /* Put PHY into POWER DOWN state: active low */
        qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
-                       cfg->pwrdn_ctrl);
+                       SW_PWRDN);
 
        return 0;
 }