ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for msiof nodes
authorSimon Horman <horms+renesas@verge.net.au>
Tue, 20 Dec 2016 10:32:39 +0000 (11:32 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 3 Jan 2017 09:47:05 +0000 (10:47 +0100)
Use recently added R-Car Gen 2 fallback binding for msiof nodes in
DT for r8a7790 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7790 and the
fallback binding for R-Car Gen 2.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm/boot/dts/r8a7790.dtsi

index ddf6a8c..44ea77f 100644 (file)
        };
 
        msiof0: spi@e6e20000 {
-               compatible = "renesas,msiof-r8a7790";
+               compatible = "renesas,msiof-r8a7790",
+                            "renesas,rcar-gen2-msiof";
                reg = <0 0xe6e20000 0 0x0064>;
                interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
        };
 
        msiof1: spi@e6e10000 {
-               compatible = "renesas,msiof-r8a7790";
+               compatible = "renesas,msiof-r8a7790",
+                            "renesas,rcar-gen2-msiof";
                reg = <0 0xe6e10000 0 0x0064>;
                interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
        };
 
        msiof2: spi@e6e00000 {
-               compatible = "renesas,msiof-r8a7790";
+               compatible = "renesas,msiof-r8a7790",
+                            "renesas,rcar-gen2-msiof";
                reg = <0 0xe6e00000 0 0x0064>;
                interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
        };
 
        msiof3: spi@e6c90000 {
-               compatible = "renesas,msiof-r8a7790";
+               compatible = "renesas,msiof-r8a7790",
+                            "renesas,rcar-gen2-msiof";
                reg = <0 0xe6c90000 0 0x0064>;
                interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;