[Port from R2] usb/penwell_otg: fix ULPI polling error

BZ: 33238

Write 0x16 register after starting ULPI polling. This will
make sure even if 0x16 register was changed by unknown
reason before ULPI polling, it never causes reseting
controler all the time.

Change-Id: I47e2c613c1d7ea5754558d593bc37a0f9739f4de
Signed-off-by: Wu, Hao <hao.wu@intel.com>
Reviewed-on: http://android.intel.com:8080/45914
Reviewed-by: Zhuang, Jin Can <jin.can.zhuang@intel.com>
Reviewed-by: Tang, Richard <richard.tang@intel.com>
Reviewed-by: Meng, Zhe <zhe.meng@intel.com>
Tested-by: Meng, Zhe <zhe.meng@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>

diff --git a/drivers/usb/otg/penwell_otg.c b/drivers/usb/otg/penwell_otg.c
index 5421141..de1fb65 100644 (file)
--- a/drivers/usb/otg/penwell_otg.c
+++ b/drivers/usb/otg/penwell_otg.c
@@ -2345,6 +2345,11 @@ static void penwell_otg_hnp_poll_work(struct work_struct *work)
 static void penwell_otg_start_ulpi_poll(void)
 {
        struct penwell_otg              *pnw = the_transceiver;
+       int                             retval = 0;
+
+       retval = penwell_otg_ulpi_write(&pnw->iotg, 0x16, 0x5a);
+       if (retval)
+               dev_err(pnw->dev, "ulpi write in init failed\n");
 
        schedule_delayed_work(&pnw->ulpi_poll_work, HZ);
 }
@@ -4188,12 +4193,6 @@ static int penwell_otg_probe(struct pci_dev *pdev,
        reset_otg();
        init_hsm();
 
-       /* Workaround for PHY issue */
-       penwell_otg_phy_low_power(0);
-       retval = penwell_otg_ulpi_write(&pnw->iotg, 0x16, 0x5a);
-       if (retval)
-               dev_err(pnw->dev, "ulpi write in init failed\n");
-
        /* we need to set active early or the first irqs will be ignored */
        pm_runtime_set_active(&pdev->dev);