arm64: dts: renesas: r8a774c0: Add dynamic power coefficient
authorBiju Das <biju.das@bp.renesas.com>
Fri, 13 Sep 2019 08:50:08 +0000 (09:50 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 1 Oct 2019 07:50:57 +0000 (09:50 +0200)
Describe the dynamic power coefficient of A53 CPUs.

Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/1568364608-46548-2-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a774c0.dtsi

index 764df4c..c7bdc36 100644 (file)
@@ -77,6 +77,7 @@
                        power-domains = <&sysc R8A774C0_PD_CA53_CPU0>;
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
+                       dynamic-power-coefficient = <277>;
                        clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
                        operating-points-v2 = <&cluster1_opp>;
                };