drm/amdgpu/powerplay: set UCLK DPM for sienna_cichlid

Enable uclk dpm for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
index a96de54..75c3159 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
@@ -43,6 +43,7 @@
 #define SMC_DPM_FEATURE ( \
        FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) | \
        FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT)     | \
+       FEATURE_MASK(FEATURE_DPM_UCLK_BIT)       | \
        FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT)     | \
        FEATURE_MASK(FEATURE_DPM_FCLK_BIT))
 
@@ -277,6 +278,9 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu,
        if (adev->pm.pp_feature & PP_SCLK_DPM_MASK)
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT);
 
+       if (adev->pm.pp_feature & PP_MCLK_DPM_MASK)
+               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT);
+
        if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK)
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT);