arm64: dts: qcom: sm6125: Append -state suffix to pinctrl nodes

[ Upstream commit cbfb5668aece448877fa7826cde81c9d06f4a4ac ]

According to qcom,sm6125-pinctrl.yaml all nodes inside the tlmm must be
suffixed by -state:

    qcom/sm6125-sony-xperia-seine-pdx201.dtb: pinctrl@500000: 'sdc2-off', 'sdc2-on' do not match any of the regexes: '-state$', 'pinctrl-[0-9]+'

The label names have been updated to match, going from sdc2_state_X to
sdc2_X_state.

Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125")
Fixes: 82e1783890b7 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220508100336.127176-2-marijn.suijten@somainline.org
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
index d4f0a15b763d64143bc1e3d76f7440aee26d359b..47f8e5397ebba2dc93f63de0812fdf64556caec0 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
+++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
@@ -88,7 +88,7 @@
        status = "okay";
 };
 
-&sdc2_state_off {
+&sdc2_off_state {
        sd-cd {
                pins = "gpio98";
                drive-strength = <2>;
@@ -96,7 +96,7 @@
        };
 };
 
-&sdc2_state_on {
+&sdc2_on_state {
        sd-cd {
                pins = "gpio98";
                drive-strength = <2>;

diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index cc16c05a2856d053b62da050764e0e2137a4a5de..f89af5e3511276924e3539b3be04ca33f265e618 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -336,7 +336,7 @@
                        interrupt-controller;
                        #interrupt-cells = <2>;
 
-                       sdc2_state_off: sdc2-off {
+                       sdc2_off_state: sdc2-off-state {
                                clk {
                                        pins = "sdc2_clk";
                                        drive-strength = <2>;
@@ -356,7 +356,7 @@
                                };
                        };
 
-                       sdc2_state_on: sdc2-on {
+                       sdc2_on_state: sdc2-on-state {
                                clk {
                                        pins = "sdc2_clk";
                                        drive-strength = <16>;
@@ -437,8 +437,8 @@
                                <&xo_board>;
                        clock-names = "iface", "core", "xo";
 
-                       pinctrl-0 = <&sdc2_state_on>;
-                       pinctrl-1 = <&sdc2_state_off>;
+                       pinctrl-0 = <&sdc2_on_state>;
+                       pinctrl-1 = <&sdc2_off_state>;
                        pinctrl-names = "default", "sleep";
 
                        bus-width = <4>;