ARM: dts: imx7: correct enet ipg clock
authorAnson Huang <Anson.Huang@nxp.com>
Fri, 18 May 2018 01:01:06 +0000 (09:01 +0800)
committerStephen Boyd <sboyd@kernel.org>
Fri, 1 Jun 2018 19:15:39 +0000 (12:15 -0700)
ENET "ipg" clock should be IMX7D_ENETx_IPG_ROOT_CLK
rather than IMX7D_ENET_AXI_ROOT_CLK which is for ENET bus
clock.

Based on Andy Duan's patch from the NXP kernel tree.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
arch/arm/boot/dts/imx7d.dtsi
arch/arm/boot/dts/imx7s.dtsi

index 200714e..d74dd7f 100644 (file)
                        <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
                        <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
                        <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+               clocks = <&clks IMX7D_ENET2_IPG_ROOT_CLK>,
                        <&clks IMX7D_ENET_AXI_ROOT_CLK>,
                        <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
                        <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
index 4d42335..b90769d 100644 (file)
                                        <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
                                        <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
                                        <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+                               clocks = <&clks IMX7D_ENET1_IPG_ROOT_CLK>,
                                        <&clks IMX7D_ENET_AXI_ROOT_CLK>,
                                        <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
                                        <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,