ARM: pxa: introduce addr-map.h for large bus addresses and ranges
authorEric Miao <eric.y.miao@gmail.com>
Wed, 13 Oct 2010 06:51:25 +0000 (14:51 +0800)
committerEric Miao <eric.y.miao@gmail.com>
Thu, 16 Dec 2010 06:31:15 +0000 (14:31 +0800)
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
arch/arm/mach-pxa/include/mach/addr-map.h [new file with mode: 0644]
arch/arm/mach-pxa/include/mach/hardware.h
arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
arch/arm/mach-pxa/include/mach/pxa3xx-regs.h

diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h
new file mode 100644 (file)
index 0000000..f4c0365
--- /dev/null
@@ -0,0 +1,48 @@
+#ifndef __ASM_MACH_ADDR_MAP_H
+#define __ASM_MACH_ADDR_MAP_H
+
+/*
+ * Chip Selects
+ */
+#define PXA_CS0_PHYS           0x00000000
+#define PXA_CS1_PHYS           0x04000000
+#define PXA_CS2_PHYS           0x08000000
+#define PXA_CS3_PHYS           0x0C000000
+#define PXA_CS4_PHYS           0x10000000
+#define PXA_CS5_PHYS           0x14000000
+
+#define PXA300_CS0_PHYS                0x00000000      /* PXA300/PXA310 _only_ */
+#define PXA300_CS1_PHYS                0x30000000      /* PXA300/PXA310 _only_ */
+#define PXA3xx_CS2_PHYS                0x10000000
+#define PXA3xx_CS3_PHYS                0x14000000
+
+/*
+ * Peripheral Bus
+ */
+#define PERIPH_PHYS            0x40000000
+#define PERIPH_VIRT            0xf2000000
+#define PERIPH_SIZE            0x02000000
+
+/*
+ * Static Memory Controller (w/ SDRAM controls on PXA25x/PXA27x)
+ */
+#define PXA2XX_SMEMC_PHYS      0x48000000
+#define PXA3XX_SMEMC_PHYS      0x4a000000
+#define SMEMC_VIRT             0xf6000000
+#define SMEMC_SIZE             0x00100000
+
+/*
+ * Dynamic Memory Controller (only on PXA3xx)
+ */
+#define DMEMC_PHYS             0x48100000
+#define DMEMC_VIRT             0xf6100000
+#define DMEMC_SIZE             0x00100000
+
+/*
+ * Internal Memory Controller (PXA27x and later)
+ */
+#define IMEMC_PHYS             0x58000000
+#define IMEMC_VIRT             0xfe000000
+#define IMEMC_SIZE             0x00100000
+
+#endif /* __ASM_MACH_ADDR_MAP_H */
index 814f145..ca188cd 100644 (file)
@@ -13,6 +13,8 @@
 #ifndef __ASM_ARCH_HARDWARE_H
 #define __ASM_ARCH_HARDWARE_H
 
+#include <mach/addr-map.h>
+
 /*
  * Workarounds for at least 2 errata so far require this.
  * The mapping is set in mach-pxa/generic.c.
index 4fcddd9..dd0fc1c 100644 (file)
 #include <mach/hardware.h>
 
 /*
- * PXA Chip selects
- */
-
-#define PXA_CS0_PHYS   0x00000000
-#define PXA_CS1_PHYS   0x04000000
-#define PXA_CS2_PHYS   0x08000000
-#define PXA_CS3_PHYS   0x0C000000
-#define PXA_CS4_PHYS   0x10000000
-#define PXA_CS5_PHYS   0x14000000
-
-/*
  * Memory controller
  */
 
index e91d63c..e4fb466 100644 (file)
 #include <mach/hardware.h>
 
 /*
- * Static Chip Selects
- */
-
-#define PXA300_CS0_PHYS                (0x00000000)    /* PXA300/PXA310 _only_ */
-#define PXA300_CS1_PHYS                (0x30000000)    /* PXA300/PXA310 _only_ */
-#define PXA3xx_CS2_PHYS                (0x10000000)
-#define PXA3xx_CS3_PHYS                (0x14000000)
-
-/*
  * Oscillator Configuration Register (OSCC)
  */
 #define OSCC           __REG(0x41350000)  /* Oscillator Configuration Register */