drm/i915: drop a few really redundant WARNs in hsw mode_set
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 28 May 2013 14:28:55 +0000 (16:28 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 31 May 2013 18:54:06 +0000 (20:54 +0200)
- Correct cpu->pch display matching is already check when we detect
  the PCH type at driver load.
- Plane/pipe state is already checked both when a) enabling, b)
  disabling and in c) the modeset state checker. No need to go
  overboard and also check it in in between a) and b).

Cc: Paulo Zanoni <przanoni@gmail.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c

index 21cbb3d..a453091 100644 (file)
@@ -5844,18 +5844,9 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
                num_connectors++;
        }
 
-       /* We are not sure yet this won't happen. */
-       WARN(!HAS_PCH_LPT(dev), "Unexpected PCH type %d\n",
-            INTEL_PCH_TYPE(dev));
-
        WARN(num_connectors != 1, "%d connectors attached to pipe %c\n",
             num_connectors, pipe_name(pipe));
 
-       WARN_ON(I915_READ(PIPECONF(intel_crtc->config.cpu_transcoder)) &
-               (PIPECONF_ENABLE | I965_PIPECONF_ACTIVE));
-
-       WARN_ON(I915_READ(DSPCNTR(plane)) & DISPLAY_PLANE_ENABLE);
-
        if (!intel_ddi_pll_mode_set(crtc, adjusted_mode->clock))
                return -EINVAL;