[mips] Attempting to use register $32 should be an error instead of an assertion.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3201

llvm-svn: 204932

diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 602bf04..5bc8f9d 100644 (file)
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -1217,7 +1217,7 @@ unsigned MipsAsmParser::getGPR(int RegNo) {
 
 int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, unsigned RegClass) {
   if (RegNum >
-      getContext().getRegisterInfo()->getRegClass(RegClass).getNumRegs())
+      getContext().getRegisterInfo()->getRegClass(RegClass).getNumRegs() - 1)
     return -1;
 
   if (RegClass == Mips::GPR32RegClassID || RegClass == Mips::GPR64RegClassID)

diff --git a/llvm/test/MC/Mips/mips-register-names-invalid.s b/llvm/test/MC/Mips/mips-register-names-invalid.s
new file mode 100644 (file)
index 0000000..df1054f
--- /dev/null
+++ b/llvm/test/MC/Mips/mips-register-names-invalid.s
@@ -0,0 +1,8 @@
+# RUN: not llvm-mc %s -triple=mips-unknown-freebsd -show-encoding 2>%t0
+# RUN: FileCheck %s < %t0
+
+# $32 used to trigger an assertion instead of the usual error message due to
+# an off-by-one bug.
+
+# CHECK: :[[@LINE+1]]:18: error: invalid operand for instruction
+        add     $32, $0, $0