[AMDGPU] Avoid RegScavenger::forward in copyPhysReg/indirectCopyToAGPR
authorJay Foad <jay.foad@amd.com>
Mon, 15 May 2023 13:42:14 +0000 (14:42 +0100)
committerJay Foad <jay.foad@amd.com>
Tue, 16 May 2023 14:51:31 +0000 (15:51 +0100)
RegScavenger::backward is preferred because it does not rely on accurate
kill flags.

Differential Revision: https://reviews.llvm.org/D150571

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

index 4f695a8..a38a835 100644 (file)
@@ -618,8 +618,8 @@ static void indirectCopyToAGPR(const SIInstrInfo &TII,
     }
   }
 
-  RS.enterBasicBlock(MBB);
-  RS.forward(MI);
+  RS.enterBasicBlockEnd(MBB);
+  RS.backward(MI);
 
   // Ideally we want to have three registers for a long reg_sequence copy
   // to hide 2 waitstates between v_mov_b32 and accvgpr_write.