drm/exynos/hdmi: add 297MHz pixel clock support

297MHz is used by UHD modes.

Change-Id: I2040adcc3f132dbf1d510309527a9e1574008961
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 3e526ccdc7e787aa54ba1a18cfb740686e56eb65..f512696d7d4d71ba785ace4b6d8315626d3d5fc7 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -711,6 +711,15 @@ static const struct hdmiphy_config hdmiphy_5430_configs[] = {
                        0x08, 0x10, 0x01, 0x01, 0x48, 0x4a, 0x00, 0x40,
                },
        },
+       {
+               .pixel_clock = 297000000,
+               .conf = {
+                       0x01, 0x51, 0x3E, 0x05, 0x40, 0xF0, 0x88, 0xC2,
+                       0x52, 0x53, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC,
+                       0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30,
+                       0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40,
+               },
+       },
 };
 
 static const char *hdmi_clk_gates4[] = {