MIPS16: Remove unused `>' operand code

This code has never been used throughout the repository history, and
likely not before either, as due to the assymetry of MIPS16 instruction
set encoding there are no 32-bit shift operations having their immediate
shift count placed in the position of the usual `rx' instruction field.

	gas/
	* config/tc-mips.c (mips16_macro_build) <'>'>: Remove case.

	include/
	* opcode/mips.h: Remove references to `>' operand code.

	opcodes/
	* mips16-opc.c (decode_mips16_operand) <'>'>: Remove cases.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index fd394ea..e3cf619 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,9 @@
 2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
 
+       * config/tc-mips.c (mips16_macro_build) <'>'>: Remove case.
+
+2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
+
        * testsuite/gas/mips/mips16-extend.d: New test.
        * testsuite/gas/mips/mips16-extend.s: New test source.
        * testsuite/gas/mips/mips.exp: Run the new test.

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 1e195d9..4288d96 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -8723,7 +8723,6 @@ mips16_macro_build (expressionS *ep, const char *name, const char *fmt,
          break;
 
        case '<':
-       case '>':
        case '4':
        case '5':
        case 'H':

diff --git a/include/ChangeLog b/include/ChangeLog
index 00cebb6..b8c9628 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * opcode/mips.h: Remove references to `>' operand code.
+
 2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
 
        * opcode/mips.h (INSN_CHIP_MASK): Update according to bit use.

diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 160fc91..a199f06 100644 (file)
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1809,7 +1809,6 @@ extern int bfd_mips_num_opcodes;
    The remaining codes may be extended.  Except as otherwise noted,
    the full extended operand is a 16 bit signed value.
    "<" 3 bit unsigned shift count * 0 (MIPS16OP_*_RZ) (full 5 bit unsigned)
-   ">" 3 bit unsigned shift count * 0 (MIPS16OP_*_RX) (full 5 bit unsigned)
    "[" 3 bit unsigned shift count * 0 (MIPS16OP_*_RZ) (full 6 bit unsigned)
    "]" 3 bit unsigned shift count * 0 (MIPS16OP_*_RX) (full 6 bit unsigned)
    "4" 4 bit signed immediate * 0 (MIPS16OP_*_IMM4) (full 15 bit signed)
@@ -1834,7 +1833,7 @@ extern int bfd_mips_num_opcodes;
 
    Characters used so far, for quick reference when adding more:
    "   456 8 0"
-   "[]<>"
+   "[]<"
    "ABCDE  HI KLM  P RS UVWXYZ"
    "a   e   ijklm  pq    vwxyz"
   */

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 8017b0f..cc2ac3c 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,9 @@
 2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
 
+       * mips16-opc.c (decode_mips16_operand) <'>'>: Remove cases.
+
+2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
+
        * mips16-opc.c (decode_mips16_operand) <'e'>: Use HINT rather
        than UINT.
 

diff --git a/opcodes/mips16-opc.c b/opcodes/mips16-opc.c
index 2b0e942..f1a67ed 100644 (file)
--- a/opcodes/mips16-opc.c
+++ b/opcodes/mips16-opc.c
@@ -76,7 +76,6 @@ decode_mips16_operand (char type, bfd_boolean extended_p)
     switch (type)
       {
       case '<': UINT (5, 0);
-      case '>': UINT (5, 0);
       case '[': UINT (6, 0);
       case ']': UINT (6, 0);
 
@@ -105,7 +104,6 @@ decode_mips16_operand (char type, bfd_boolean extended_p)
     switch (type)
       {
       case '<': INT_ADJ (3, 2, 8, 0, FALSE);
-      case '>': INT_ADJ (3, 8, 8, 0, FALSE);
       case '[': INT_ADJ (3, 2, 8, 0, FALSE);
       case ']': INT_ADJ (3, 8, 8, 0, FALSE);