soc: mediatek: add mtk-mutex support for mt8188 vdosys0

add mtk-mutex support for mt8188 vdosys0.

Signed-off-by: amy zhang <Amy.Zhang@mediatek.com>
Signed-off-by: Nathan Lu <nathan.lu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221206020046.11333-6-nathan.lu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index 85f7fd6..cc93472 100644 (file)
--- a/drivers/soc/mediatek/mtk-mutex.c
+++ b/drivers/soc/mediatek/mtk-mutex.c
@@ -116,6 +116,21 @@
 #define MT8173_MUTEX_MOD_DISP_PWM1             24
 #define MT8173_MUTEX_MOD_DISP_OD               25
 
+#define MT8188_MUTEX_MOD_DISP_OVL0             0
+#define MT8188_MUTEX_MOD_DISP_WDMA0            1
+#define MT8188_MUTEX_MOD_DISP_RDMA0            2
+#define MT8188_MUTEX_MOD_DISP_COLOR0           3
+#define MT8188_MUTEX_MOD_DISP_CCORR0           4
+#define MT8188_MUTEX_MOD_DISP_AAL0             5
+#define MT8188_MUTEX_MOD_DISP_GAMMA0           6
+#define MT8188_MUTEX_MOD_DISP_DITHER0          7
+#define MT8188_MUTEX_MOD_DISP_DSI0             8
+#define MT8188_MUTEX_MOD_DISP_DSC_WRAP0_CORE0  9
+#define MT8188_MUTEX_MOD_DISP_VPP_MERGE                20
+#define MT8188_MUTEX_MOD_DISP_DP_INTF0         21
+#define MT8188_MUTEX_MOD_DISP_POSTMASK0                24
+#define MT8188_MUTEX_MOD2_DISP_PWM0            33
+
 #define MT8195_MUTEX_MOD_DISP_OVL0             0
 #define MT8195_MUTEX_MOD_DISP_WDMA0            1
 #define MT8195_MUTEX_MOD_DISP_RDMA0            2
@@ -180,6 +195,8 @@
 #define MT8167_MUTEX_SOF_DPI1                  3
 #define MT8183_MUTEX_SOF_DSI0                  1
 #define MT8183_MUTEX_SOF_DPI0                  2
+#define MT8188_MUTEX_SOF_DSI0                  1
+#define MT8188_MUTEX_SOF_DP_INTF0              3
 #define MT8195_MUTEX_SOF_DSI0                  1
 #define MT8195_MUTEX_SOF_DSI1                  2
 #define MT8195_MUTEX_SOF_DP_INTF0              3
@@ -189,6 +206,8 @@
 
 #define MT8183_MUTEX_EOF_DSI0                  (MT8183_MUTEX_SOF_DSI0 << 6)
 #define MT8183_MUTEX_EOF_DPI0                  (MT8183_MUTEX_SOF_DPI0 << 6)
+#define MT8188_MUTEX_EOF_DSI0                  (MT8188_MUTEX_SOF_DSI0 << 7)
+#define MT8188_MUTEX_EOF_DP_INTF0              (MT8188_MUTEX_SOF_DP_INTF0 << 7)
 #define MT8195_MUTEX_EOF_DSI0                  (MT8195_MUTEX_SOF_DSI0 << 7)
 #define MT8195_MUTEX_EOF_DSI1                  (MT8195_MUTEX_SOF_DSI1 << 7)
 #define MT8195_MUTEX_EOF_DP_INTF0              (MT8195_MUTEX_SOF_DP_INTF0 << 7)
@@ -344,6 +363,23 @@ static const unsigned int mt8186_mdp_mutex_table_mod[MUTEX_MOD_IDX_MAX] = {
        [MUTEX_MOD_IDX_MDP_COLOR0] = MT8186_MUTEX_MOD_MDP_COLOR0,
 };
 
+static const unsigned int mt8188_mutex_mod[DDP_COMPONENT_ID_MAX] = {
+       [DDP_COMPONENT_OVL0] = MT8188_MUTEX_MOD_DISP_OVL0,
+       [DDP_COMPONENT_WDMA0] = MT8188_MUTEX_MOD_DISP_WDMA0,
+       [DDP_COMPONENT_RDMA0] = MT8188_MUTEX_MOD_DISP_RDMA0,
+       [DDP_COMPONENT_COLOR0] = MT8188_MUTEX_MOD_DISP_COLOR0,
+       [DDP_COMPONENT_CCORR] = MT8188_MUTEX_MOD_DISP_CCORR0,
+       [DDP_COMPONENT_AAL0] = MT8188_MUTEX_MOD_DISP_AAL0,
+       [DDP_COMPONENT_GAMMA] = MT8188_MUTEX_MOD_DISP_GAMMA0,
+       [DDP_COMPONENT_POSTMASK0] = MT8188_MUTEX_MOD_DISP_POSTMASK0,
+       [DDP_COMPONENT_DITHER0] = MT8188_MUTEX_MOD_DISP_DITHER0,
+       [DDP_COMPONENT_MERGE0] = MT8188_MUTEX_MOD_DISP_VPP_MERGE,
+       [DDP_COMPONENT_DSC0] = MT8188_MUTEX_MOD_DISP_DSC_WRAP0_CORE0,
+       [DDP_COMPONENT_DSI0] = MT8188_MUTEX_MOD_DISP_DSI0,
+       [DDP_COMPONENT_PWM0] = MT8188_MUTEX_MOD2_DISP_PWM0,
+       [DDP_COMPONENT_DP_INTF0] = MT8188_MUTEX_MOD_DISP_DP_INTF0,
+};
+
 static const unsigned int mt8192_mutex_mod[DDP_COMPONENT_ID_MAX] = {
        [DDP_COMPONENT_AAL0] = MT8192_MUTEX_MOD_DISP_AAL0,
        [DDP_COMPONENT_CCORR] = MT8192_MUTEX_MOD_DISP_CCORR0,
@@ -435,6 +471,14 @@ static const unsigned int mt8186_mutex_sof[MUTEX_SOF_DSI3 + 1] = {
  * but also detect the error at end of frame(EAEOF) when EOF signal
  * arrives.
  */
+static const unsigned int mt8188_mutex_sof[DDP_MUTEX_SOF_MAX] = {
+       [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
+       [MUTEX_SOF_DSI0] =
+               MT8188_MUTEX_SOF_DSI0 | MT8188_MUTEX_EOF_DSI0,
+       [MUTEX_SOF_DP_INTF0] =
+               MT8188_MUTEX_SOF_DP_INTF0 | MT8188_MUTEX_EOF_DP_INTF0,
+};
+
 static const unsigned int mt8195_mutex_sof[DDP_MUTEX_SOF_MAX] = {
        [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
        [MUTEX_SOF_DSI0] = MT8195_MUTEX_SOF_DSI0 | MT8195_MUTEX_EOF_DSI0,
@@ -505,6 +549,13 @@ static const struct mtk_mutex_data mt8186_mutex_driver_data = {
        .mutex_sof_reg = MT8183_MUTEX0_SOF0,
 };
 
+static const struct mtk_mutex_data mt8188_mutex_driver_data = {
+       .mutex_mod = mt8188_mutex_mod,
+       .mutex_sof = mt8188_mutex_sof,
+       .mutex_mod_reg = MT8183_MUTEX0_MOD0,
+       .mutex_sof_reg = MT8183_MUTEX0_SOF0,
+};
+
 static const struct mtk_mutex_data mt8192_mutex_driver_data = {
        .mutex_mod = mt8192_mutex_mod,
        .mutex_sof = mt8183_mutex_sof,
@@ -849,6 +900,8 @@ static const struct of_device_id mutex_driver_dt_match[] = {
          .data = &mt8186_mutex_driver_data},
        { .compatible = "mediatek,mt8186-mdp3-mutex",
          .data = &mt8186_mdp_mutex_driver_data},
+       { .compatible = "mediatek,mt8188-disp-mutex",
+         .data = &mt8188_mutex_driver_data},
        { .compatible = "mediatek,mt8192-disp-mutex",
          .data = &mt8192_mutex_driver_data},
        { .compatible = "mediatek,mt8195-disp-mutex",