freedreno: a2xx: cleanup REG_A2XX_PA_CL_VTE_CNTL

Doesn't change much, but reduces the size of fd2_emit_state

gmem2mem does not need to change the value: no Z clipping on resolve
mem2gmem now needs to restore the common value after rendering

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@gmail.com>

diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
index 60bc9fa..7dcd31c 100644 (file)
--- a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
@@ -272,16 +272,6 @@ fd2_emit_state(struct fd_context *ctx, const enum fd_dirty_3d_state dirty)
                OUT_RING(ring, fui(ctx->viewport.translate[1]));   /* PA_CL_VPORT_YOFFSET */
                OUT_RING(ring, fui(ctx->viewport.scale[2]));       /* PA_CL_VPORT_ZSCALE */
                OUT_RING(ring, fui(ctx->viewport.translate[2]));   /* PA_CL_VPORT_ZOFFSET */
-
-               OUT_PKT3(ring, CP_SET_CONSTANT, 2);
-               OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VTE_CNTL));
-               OUT_RING(ring, A2XX_PA_CL_VTE_CNTL_VTX_W0_FMT |
-                               A2XX_PA_CL_VTE_CNTL_VPORT_X_SCALE_ENA |
-                               A2XX_PA_CL_VTE_CNTL_VPORT_X_OFFSET_ENA |
-                               A2XX_PA_CL_VTE_CNTL_VPORT_Y_SCALE_ENA |
-                               A2XX_PA_CL_VTE_CNTL_VPORT_Y_OFFSET_ENA |
-                               A2XX_PA_CL_VTE_CNTL_VPORT_Z_SCALE_ENA |
-                               A2XX_PA_CL_VTE_CNTL_VPORT_Z_OFFSET_ENA);
        }
 
        if (dirty & (FD_DIRTY_PROG | FD_DIRTY_VTXSTATE | FD_DIRTY_TEXSTATE)) {
@@ -475,6 +465,16 @@ fd2_emit_restore(struct fd_context *ctx, struct fd_ringbuffer *ring)
        OUT_RING(ring, 0x00000000);        /* RB_BLEND_GREEN */
        OUT_RING(ring, 0x00000000);        /* RB_BLEND_BLUE */
        OUT_RING(ring, 0x000000ff);        /* RB_BLEND_ALPHA */
+
+       OUT_PKT3(ring, CP_SET_CONSTANT, 2);
+       OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VTE_CNTL));
+       OUT_RING(ring, A2XX_PA_CL_VTE_CNTL_VTX_W0_FMT |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_X_SCALE_ENA |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_X_OFFSET_ENA |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_Y_SCALE_ENA |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_Y_OFFSET_ENA |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_Z_SCALE_ENA |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_Z_OFFSET_ENA);
 }
 
 static void

diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
index 263e9d7..199bf94 100644 (file)
--- a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
@@ -157,14 +157,6 @@ fd2_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
        OUT_RING(ring, xy2d(pfb->width, pfb->height));    /* PA_SC_WINDOW_SCISSOR_BR */
 
        OUT_PKT3(ring, CP_SET_CONSTANT, 2);
-       OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VTE_CNTL));
-       OUT_RING(ring, A2XX_PA_CL_VTE_CNTL_VTX_W0_FMT |
-                       A2XX_PA_CL_VTE_CNTL_VPORT_X_SCALE_ENA |
-                       A2XX_PA_CL_VTE_CNTL_VPORT_X_OFFSET_ENA |
-                       A2XX_PA_CL_VTE_CNTL_VPORT_Y_SCALE_ENA |
-                       A2XX_PA_CL_VTE_CNTL_VPORT_Y_OFFSET_ENA);
-
-       OUT_PKT3(ring, CP_SET_CONSTANT, 2);
        OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_CLIP_CNTL));
        OUT_RING(ring, 0x00000000);
 
@@ -350,6 +342,16 @@ fd2_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile)
        if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_COLOR))
                emit_mem2gmem_surf(batch, gmem->cbuf_base[0], pfb->cbufs[0]);
 
+       OUT_PKT3(ring, CP_SET_CONSTANT, 2);
+       OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VTE_CNTL));
+       OUT_RING(ring, A2XX_PA_CL_VTE_CNTL_VTX_W0_FMT |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_X_SCALE_ENA |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_X_OFFSET_ENA |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_Y_SCALE_ENA |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_Y_OFFSET_ENA |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_Z_SCALE_ENA |
+                       A2XX_PA_CL_VTE_CNTL_VPORT_Z_OFFSET_ENA);
+
        /* TODO blob driver seems to toss in a CACHE_FLUSH after each DRAW_INDX.. */
 }