[X86] Add tests for the lowering SHLD/SHRD from manual pattern similar to those gener...

Test for add(v,v) as well as shl(v,1)

llvm-svn: 277293

diff --git a/llvm/test/CodeGen/X86/shift-double-x86_64.ll b/llvm/test/CodeGen/X86/shift-double-x86_64.ll
index 80d116a..706f066 100644 (file)
--- a/llvm/test/CodeGen/X86/shift-double-x86_64.ll
+++ b/llvm/test/CodeGen/X86/shift-double-x86_64.ll
@@ -62,3 +62,64 @@ define i64 @test4(i64 %hi, i64 %lo, i64 %bits) nounwind {
   %sh = or i64 %sh_lo, %sh_hi
   ret i64 %sh
 }
+
+define i64 @test5(i64 %hi, i64 %lo, i64 %bits) nounwind {
+; CHECK-LABEL: test5:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    xorl $63, %ecx
+; CHECK-NEXT:    shrq %rsi
+; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
+; CHECK-NEXT:    shrq %cl, %rsi
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    shlq %cl, %rdi
+; CHECK-NEXT:    orq %rsi, %rdi
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    retq
+  %bits64 = xor i64 %bits, 63
+  %lo2 = lshr i64 %lo, 1
+  %sh_lo = lshr i64 %lo2, %bits64
+  %sh_hi = shl i64 %hi, %bits
+  %sh = or i64 %sh_lo, %sh_hi
+  ret i64 %sh
+}
+
+define i64 @test6(i64 %hi, i64 %lo, i64 %bits) nounwind {
+; CHECK-LABEL: test6:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    xorl $63, %ecx
+; CHECK-NEXT:    leaq (%rsi,%rsi), %rax
+; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
+; CHECK-NEXT:    shlq %cl, %rax
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    shrq %cl, %rdi
+; CHECK-NEXT:    orq %rdi, %rax
+; CHECK-NEXT:    retq
+  %bits64 = xor i64 %bits, 63
+  %lo2 = shl i64 %lo, 1
+  %sh_lo = shl i64 %lo2, %bits64
+  %sh_hi = lshr i64 %hi, %bits
+  %sh = or i64 %sh_lo, %sh_hi
+  ret i64 %sh
+}
+
+define i64 @test7(i64 %hi, i64 %lo, i64 %bits) nounwind {
+; CHECK-LABEL: test7:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    xorl $63, %ecx
+; CHECK-NEXT:    leaq (%rsi,%rsi), %rax
+; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
+; CHECK-NEXT:    shlq %cl, %rax
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    shrq %cl, %rdi
+; CHECK-NEXT:    orq %rdi, %rax
+; CHECK-NEXT:    retq
+  %bits64 = xor i64 %bits, 63
+  %lo2 = add i64 %lo, %lo
+  %sh_lo = shl i64 %lo2, %bits64
+  %sh_hi = lshr i64 %hi, %bits
+  %sh = or i64 %sh_lo, %sh_hi
+  ret i64 %sh
+}

diff --git a/llvm/test/CodeGen/X86/shift-double.ll b/llvm/test/CodeGen/X86/shift-double.ll
index 3aca9ac..0cb6a57 100644 (file)
--- a/llvm/test/CodeGen/X86/shift-double.ll
+++ b/llvm/test/CodeGen/X86/shift-double.ll
@@ -287,3 +287,78 @@ define i32 @test14(i32 %hi, i32 %lo, i32 %bits) nounwind {
   %sh = or i32 %sh_lo, %sh_hi
   ret i32 %sh
 }
+
+define i32 @test15(i32 %hi, i32 %lo, i32 %bits) nounwind {
+; CHECK-LABEL: test15:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    pushl %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    xorl $31, %ecx
+; CHECK-NEXT:    shrl %esi
+; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
+; CHECK-NEXT:    shrl %cl, %esi
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    shll %cl, %eax
+; CHECK-NEXT:    orl %esi, %eax
+; CHECK-NEXT:    popl %esi
+; CHECK-NEXT:    retl
+  %bits32 = xor i32 %bits, 31
+  %lo2 = lshr i32 %lo, 1
+  %sh_lo = lshr i32 %lo2, %bits32
+  %sh_hi = shl i32 %hi, %bits
+  %sh = or i32 %sh_lo, %sh_hi
+  ret i32 %sh
+}
+
+define i32 @test16(i32 %hi, i32 %lo, i32 %bits) nounwind {
+; CHECK-LABEL: test16:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    pushl %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    xorl $31, %ecx
+; CHECK-NEXT:    addl %esi, %esi
+; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
+; CHECK-NEXT:    shll %cl, %esi
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    shrl %cl, %eax
+; CHECK-NEXT:    orl %esi, %eax
+; CHECK-NEXT:    popl %esi
+; CHECK-NEXT:    retl
+  %bits32 = xor i32 %bits, 31
+  %lo2 = shl i32 %lo, 1
+  %sh_lo = shl i32 %lo2, %bits32
+  %sh_hi = lshr i32 %hi, %bits
+  %sh = or i32 %sh_lo, %sh_hi
+  ret i32 %sh
+}
+
+define i32 @test17(i32 %hi, i32 %lo, i32 %bits) nounwind {
+; CHECK-LABEL: test17:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    pushl %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    xorl $31, %ecx
+; CHECK-NEXT:    addl %esi, %esi
+; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
+; CHECK-NEXT:    shll %cl, %esi
+; CHECK-NEXT:    movl %edx, %ecx
+; CHECK-NEXT:    shrl %cl, %eax
+; CHECK-NEXT:    orl %esi, %eax
+; CHECK-NEXT:    popl %esi
+; CHECK-NEXT:    retl
+  %bits32 = xor i32 %bits, 31
+  %lo2 = add i32 %lo, %lo
+  %sh_lo = shl i32 %lo2, %bits32
+  %sh_hi = lshr i32 %hi, %bits
+  %sh = or i32 %sh_lo, %sh_hi
+  ret i32 %sh
+}