drm/amdgpu: move psp macro into amdgpu_psp header

Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index d39053d..0568140 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1353,7 +1353,6 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
 #define amdgpu_display_add_encoder(adev, e, s, c) (adev)->mode_info.funcs->add_encoder((adev), (e), (s), (c))
 #define amdgpu_display_add_connector(adev, ci, sd, ct, ib, coi, h, r) (adev)->mode_info.funcs->add_connector((adev), (ci), (sd), (ct), (ib), (coi), (h), (r))
 #define amdgpu_gds_switch(adev, r, v, d, w, a) (adev)->gds.funcs->patch_gds_switch((r), (v), (d), (w), (a))
-#define amdgpu_psp_check_fw_loading_status(adev, i) (adev)->firmware.funcs->check_fw_loading_status((adev), (i))
 
 /* Common functions */
 int amdgpu_device_gpu_recover(struct amdgpu_device *adev,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
index 1292096..967712f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
@@ -63,13 +63,16 @@ struct psp_funcs
        int (*prep_cmd_buf)(struct amdgpu_firmware_info *ucode,
                            struct psp_gfx_cmd_resp *cmd);
        int (*ring_init)(struct psp_context *psp, enum psp_ring_type ring_type);
-       int (*ring_create)(struct psp_context *psp, enum psp_ring_type ring_type);
+       int (*ring_create)(struct psp_context *psp,
+                          enum psp_ring_type ring_type);
        int (*ring_stop)(struct psp_context *psp,
                            enum psp_ring_type ring_type);
        int (*ring_destroy)(struct psp_context *psp,
                            enum psp_ring_type ring_type);
-       int (*cmd_submit)(struct psp_context *psp, struct amdgpu_firmware_info *ucode,
-                         uint64_t cmd_buf_mc_addr, uint64_t fence_mc_addr, int index);
+       int (*cmd_submit)(struct psp_context *psp,
+                         struct amdgpu_firmware_info *ucode,
+                         uint64_t cmd_buf_mc_addr, uint64_t fence_mc_addr,
+                         int index);
        bool (*compare_sram_data)(struct psp_context *psp,
                                  struct amdgpu_firmware_info *ucode,
                                  enum AMDGPU_UCODE_ID ucode_type);
@@ -83,11 +86,11 @@ struct psp_context
        struct psp_ring                 km_ring;
        struct psp_gfx_cmd_resp         *cmd;
 
-       const struct psp_funcs          *funcs;
+       const struct psp_funcs          *funcs;
 
        /* fence buffer */
-       struct amdgpu_bo                *fw_pri_bo;
-       uint64_t                        fw_pri_mc_addr;
+       struct amdgpu_bo                *fw_pri_bo;
+       uint64_t                        fw_pri_mc_addr;
        void                            *fw_pri_buf;
 
        /* sos firmware */
@@ -100,8 +103,8 @@ struct psp_context
        uint8_t                         *sos_start_addr;
 
        /* tmr buffer */
-       struct amdgpu_bo                *tmr_bo;
-       uint64_t                        tmr_mc_addr;
+       struct amdgpu_bo                *tmr_bo;
+       uint64_t                        tmr_mc_addr;
        void                            *tmr_buf;
 
        /* asd firmware and buffer */
@@ -110,13 +113,13 @@ struct psp_context
        uint32_t                        asd_feature_version;
        uint32_t                        asd_ucode_size;
        uint8_t                         *asd_start_addr;
-       struct amdgpu_bo                *asd_shared_bo;
-       uint64_t                        asd_shared_mc_addr;
+       struct amdgpu_bo                *asd_shared_bo;
+       uint64_t                        asd_shared_mc_addr;
        void                            *asd_shared_buf;
 
        /* fence buffer */
-       struct amdgpu_bo                *fence_buf_bo;
-       uint64_t                        fence_buf_mc_addr;
+       struct amdgpu_bo                *fence_buf_bo;
+       uint64_t                        fence_buf_mc_addr;
        void                            *fence_buf;
 
        /* cmd buffer */
@@ -150,6 +153,8 @@ struct amdgpu_psp_funcs {
 #define psp_mode1_reset(psp) \
                ((psp)->funcs->mode1_reset ? (psp)->funcs->mode1_reset((psp)) : false)
 
+#define amdgpu_psp_check_fw_loading_status(adev, i) (adev)->firmware.funcs->check_fw_loading_status((adev), (i))
+
 extern const struct amd_ip_funcs psp_ip_funcs;
 
 extern const struct amdgpu_ip_block_version psp_v3_1_ip_block;