$(BUILD_PFX)%_neon_dotprod.c.o: CFLAGS += -march=armv8.2-a+dotprod
$(BUILD_PFX)%_neon_i8mm.c.d: CFLAGS += -march=armv8.2-a+dotprod+i8mm
$(BUILD_PFX)%_neon_i8mm.c.o: CFLAGS += -march=armv8.2-a+dotprod+i8mm
+$(BUILD_PFX)%_sve.c.d: CFLAGS += -march=armv8.2-a+dotprod+i8mm+sve
+$(BUILD_PFX)%_sve.c.o: CFLAGS += -march=armv8.2-a+dotprod+i8mm+sve
# POWER
$(BUILD_PFX)%_vsx.c.d: CFLAGS += -maltivec -mvsx
@ALL_ARCHS = filter(qw/neon_asm neon/);
arm;
} elsif ($opts{arch} eq 'armv8' || $opts{arch} eq 'arm64' ) {
- @ALL_ARCHS = filter(qw/neon neon_dotprod neon_i8mm/);
+ @ALL_ARCHS = filter(qw/neon neon_dotprod neon_i8mm sve/);
@REQUIRES = filter(qw/neon/);
&require(@REQUIRES);
arm;
if (!(caps & HAS_NEON_I8MM)) {
append_negative_gtest_filter(":NEON_I8MM.*:NEON_I8MM/*");
}
+ if (!(caps & HAS_SVE)) {
+ append_negative_gtest_filter(":SVE.*:SVE/*");
+ }
#elif VPX_ARCH_ARM
const int caps = arm_cpu_caps();
if (!(caps & HAS_NEON)) append_negative_gtest_filter(":NEON.*:NEON/*");
}
#endif // defined(PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE)
#endif // HAVE_NEON_DOTPROD
- // No I8MM feature detection available on Windows at time of writing.
+ // No I8MM or SVE feature detection available on Windows at time of writing.
return flags;
}
// Define hwcap values ourselves: building with an old auxv header where these
// hwcap values are not defined should not prevent features from being enabled.
#define VPX_AARCH64_HWCAP_ASIMDDP (1 << 20)
+#define VPX_AARCH64_HWCAP_SVE (1 << 22)
#define VPX_AARCH64_HWCAP2_I8MM (1 << 13)
static int arm_get_cpu_caps(void) {
flags |= HAS_NEON_I8MM;
}
#endif // HAVE_NEON_I8MM
+#if HAVE_SVE
+ if (hwcap & VPX_AARCH64_HWCAP_SVE) {
+ flags |= HAS_SVE;
+ }
+#endif // HAVE_SVE
return flags;
}
#ifndef ZX_ARM64_FEATURE_ISA_I8MM
#define ZX_ARM64_FEATURE_ISA_I8MM ((uint32_t)(1u << 19))
#endif
+// Added in https://fuchsia-review.googlesource.com/c/fuchsia/+/895083.
+#ifndef ZX_ARM64_FEATURE_ISA_SVE
+#define ZX_ARM64_FEATURE_ISA_SVE ((uint32_t)(1u << 20))
+#endif
static int arm_get_cpu_caps(void) {
int flags = 0;
flags |= HAS_NEON_I8MM;
}
#endif // HAVE_NEON_I8MM
+#if HAVE_SVE
+ if (features & ZX_ARM64_FEATURE_ISA_SVE) {
+ flags |= HAS_SVE;
+ }
+#endif // HAVE_SVE
return flags;
}
flags &= ~HAS_NEON_I8MM;
}
+ // Restrict flags: FEAT_SVE assumes that FEAT_{DotProd,I8MM} are available.
+ if (!(flags & HAS_NEON_DOTPROD)) {
+ flags &= ~HAS_SVE;
+ }
+ if (!(flags & HAS_NEON_I8MM)) {
+ flags &= ~HAS_SVE;
+ }
+
return flags;
}
#define HAS_NEON_DOTPROD (1 << 1)
// Armv8.2-A optional Neon i8mm instructions, mandatory from Armv8.6-A.
#define HAS_NEON_I8MM (1 << 2)
+// Armv8.2-A optional SVE instructions, mandatory from Armv9.0-A.
+#define HAS_SVE (1 << 3)
int arm_cpu_caps(void);