https://developer.arm.com/documentation/den0024/a/Caches/Cache-maintenance
covers how to properly clear caches on AArch64, and the builtin
implementation was missing a `dsb ish` after clearing the icache for the
selected range.
Reviewed By: kristof.beyls
Differential Revision: https://reviews.llvm.org/D104094
addr += icache_line_size)
__asm __volatile("ic ivau, %0" ::"r"(addr));
}
+ __asm __volatile("dsb ish");
__asm __volatile("isb sy");
#elif defined(__powerpc64__)
const size_t line_size = 32;