drm/amdgpu: Add doorbell routing info to kgd2kfd_shared_resources

This is needed for Vega10 and later ASICs to let KFD know which
doorbells can be used for SDMA and CP queues respectively.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index fcd10db..cd0e8f1 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -179,6 +179,28 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
                                &gpu_resources.doorbell_physical_address,
                                &gpu_resources.doorbell_aperture_size,
                                &gpu_resources.doorbell_start_offset);
+               if (adev->asic_type >= CHIP_VEGA10) {
+                       /* On SOC15 the BIF is involved in routing
+                        * doorbells using the low 12 bits of the
+                        * address. Communicate the assignments to
+                        * KFD. KFD uses two doorbell pages per
+                        * process in case of 64-bit doorbells so we
+                        * can use each doorbell assignment twice.
+                        */
+                       gpu_resources.sdma_doorbell[0][0] =
+                               AMDGPU_DOORBELL64_sDMA_ENGINE0;
+                       gpu_resources.sdma_doorbell[0][1] =
+                               AMDGPU_DOORBELL64_sDMA_ENGINE0 + 0x200;
+                       gpu_resources.sdma_doorbell[1][0] =
+                               AMDGPU_DOORBELL64_sDMA_ENGINE1;
+                       gpu_resources.sdma_doorbell[1][1] =
+                               AMDGPU_DOORBELL64_sDMA_ENGINE1 + 0x200;
+                       /* Doorbells 0x0f0-0ff and 0x2f0-2ff are reserved for
+                        * SDMA, IH and VCN. So don't use them for the CP.
+                        */
+                       gpu_resources.reserved_doorbell_mask = 0x1f0;
+                       gpu_resources.reserved_doorbell_val  = 0x0f0;
+               }
 
                kgd2kfd->device_init(adev->kfd, &gpu_resources);
        }

diff --git a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
index 7cf3506..5733fbe 100644 (file)
--- a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
@@ -100,6 +100,21 @@ struct kgd2kfd_shared_resources {
        /* Bit n == 1 means Queue n is available for KFD */
        DECLARE_BITMAP(queue_bitmap, KGD_MAX_QUEUES);
 
+       /* Doorbell assignments (SOC15 and later chips only). Only
+        * specific doorbells are routed to each SDMA engine. Others
+        * are routed to IH and VCN. They are not usable by the CP.
+        *
+        * Any doorbell number D that satisfies the following condition
+        * is reserved: (D & reserved_doorbell_mask) == reserved_doorbell_val
+        *
+        * KFD currently uses 1024 (= 0x3ff) doorbells per process. If
+        * doorbells 0x0f0-0x0f7 and 0x2f-0x2f7 are reserved, that means
+        * mask would be set to 0x1f8 and val set to 0x0f0.
+        */
+       unsigned int sdma_doorbell[2][2];
+       unsigned int reserved_doorbell_mask;
+       unsigned int reserved_doorbell_val;
+
        /* Base address of doorbell aperture. */
        phys_addr_t doorbell_physical_address;