drm/amdgpu: add gfx firmware header v2_0
authorLikun Gao <Likun.Gao@amd.com>
Tue, 25 May 2021 03:13:27 +0000 (11:13 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 4 May 2022 14:02:36 +0000 (10:02 -0400)
We need define new firmware header to support
CP RS64 fw.

Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h

index 62ce16c..52f40ae 100644 (file)
@@ -115,6 +115,12 @@ void amdgpu_ucode_print_gfx_hdr(const struct common_firmware_header *hdr)
                          le32_to_cpu(gfx_hdr->ucode_feature_version));
                DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset));
                DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size));
+       } else if (version_major == 2) {
+               const struct gfx_firmware_header_v2_0 *gfx_hdr =
+                       container_of(hdr, struct gfx_firmware_header_v2_0, header);
+
+               DRM_DEBUG("ucode_feature_version: %u\n",
+                         le32_to_cpu(gfx_hdr->ucode_feature_version));
        } else {
                DRM_ERROR("Unknown GFX ucode version: %u.%u\n", version_major, version_minor);
        }
index 1c2d1f9..bf9ead9 100644 (file)
@@ -170,6 +170,18 @@ struct gfx_firmware_header_v1_0 {
        uint32_t jt_size;  /* size of jt */
 };
 
+/* version_major=2, version_minor=0 */
+struct gfx_firmware_header_v2_0 {
+       struct common_firmware_header header;
+       uint32_t ucode_feature_version;
+       uint32_t ucode_size_bytes;
+       uint32_t ucode_offset_bytes;
+       uint32_t data_size_bytes;
+       uint32_t data_offset_bytes;
+       uint32_t ucode_start_addr_lo;
+       uint32_t ucode_start_addr_hi;
+};
+
 /* version_major=1, version_minor=0 */
 struct mes_firmware_header_v1_0 {
        struct common_firmware_header header;
@@ -326,6 +338,7 @@ union amdgpu_firmware_header {
        struct ta_firmware_header_v1_0 ta;
        struct ta_firmware_header_v2_0 ta_v2_0;
        struct gfx_firmware_header_v1_0 gfx;
+       struct gfx_firmware_header_v2_0 gfx_v2_0;
        struct rlc_firmware_header_v1_0 rlc;
        struct rlc_firmware_header_v2_0 rlc_v2_0;
        struct rlc_firmware_header_v2_1 rlc_v2_1;