drm/mediatek: Add support for SoC MT8183
authorYongqiang Niu <yongqiang.niu@mediatek.com>
Fri, 29 Jan 2021 09:22:09 +0000 (17:22 +0800)
committerChun-Kuang Hu <chunkuang.hu@kernel.org>
Thu, 4 Feb 2021 14:55:46 +0000 (22:55 +0800)
1. Add ovl private data
2. Add rdma private data
3. Add gamma privte data
4. Add main and external path module for crtc create

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
drivers/gpu/drm/mediatek/mtk_disp_gamma.c
drivers/gpu/drm/mediatek/mtk_disp_ovl.c
drivers/gpu/drm/mediatek/mtk_disp_rdma.c
drivers/gpu/drm/mediatek/mtk_drm_drv.c

index 80e3918..3ebf91e 100644 (file)
@@ -181,6 +181,7 @@ static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
 static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
        { .compatible = "mediatek,mt8173-disp-gamma",
          .data = &mt8173_gamma_driver_data},
+       { .compatible = "mediatek,mt8183-disp-gamma"},
        {},
 };
 MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match);
index 1c295c5..da7e38a 100644 (file)
@@ -424,11 +424,29 @@ static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = {
        .fmt_rgb565_is_0 = true,
 };
 
+static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = {
+       .addr = DISP_REG_OVL_ADDR_MT8173,
+       .gmc_bits = 10,
+       .layer_nr = 4,
+       .fmt_rgb565_is_0 = true,
+};
+
+static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = {
+       .addr = DISP_REG_OVL_ADDR_MT8173,
+       .gmc_bits = 10,
+       .layer_nr = 2,
+       .fmt_rgb565_is_0 = true,
+};
+
 static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = {
        { .compatible = "mediatek,mt2701-disp-ovl",
          .data = &mt2701_ovl_driver_data},
        { .compatible = "mediatek,mt8173-disp-ovl",
          .data = &mt8173_ovl_driver_data},
+       { .compatible = "mediatek,mt8183-disp-ovl",
+         .data = &mt8183_ovl_driver_data},
+       { .compatible = "mediatek,mt8183-disp-ovl-2l",
+         .data = &mt8183_ovl_2l_driver_data},
        {},
 };
 MODULE_DEVICE_TABLE(of, mtk_disp_ovl_driver_dt_match);
index b840043..728aaad 100644 (file)
@@ -351,11 +351,17 @@ static const struct mtk_disp_rdma_data mt8173_rdma_driver_data = {
        .fifo_size = SZ_8K,
 };
 
+static const struct mtk_disp_rdma_data mt8183_rdma_driver_data = {
+       .fifo_size = 5 * SZ_1K,
+};
+
 static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = {
        { .compatible = "mediatek,mt2701-disp-rdma",
          .data = &mt2701_rdma_driver_data},
        { .compatible = "mediatek,mt8173-disp-rdma",
          .data = &mt8173_rdma_driver_data},
+       { .compatible = "mediatek,mt8183-disp-rdma",
+         .data = &mt8183_rdma_driver_data},
        {},
 };
 MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match);
index 279d3e6..486e73e 100644 (file)
@@ -129,6 +129,24 @@ static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
        DDP_COMPONENT_DPI0,
 };
 
+static const enum mtk_ddp_comp_id mt8183_mtk_ddp_main[] = {
+       DDP_COMPONENT_OVL0,
+       DDP_COMPONENT_OVL_2L0,
+       DDP_COMPONENT_RDMA0,
+       DDP_COMPONENT_COLOR0,
+       DDP_COMPONENT_CCORR,
+       DDP_COMPONENT_AAL0,
+       DDP_COMPONENT_GAMMA,
+       DDP_COMPONENT_DITHER,
+       DDP_COMPONENT_DSI0,
+};
+
+static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = {
+       DDP_COMPONENT_OVL_2L1,
+       DDP_COMPONENT_RDMA1,
+       DDP_COMPONENT_DPI0,
+};
+
 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
        .main_path = mt2701_mtk_ddp_main,
        .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
@@ -161,6 +179,13 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
        .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
 };
 
+static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
+       .main_path = mt8183_mtk_ddp_main,
+       .main_len = ARRAY_SIZE(mt8183_mtk_ddp_main),
+       .ext_path = mt8183_mtk_ddp_ext,
+       .ext_len = ARRAY_SIZE(mt8183_mtk_ddp_ext),
+};
+
 static int mtk_drm_kms_init(struct drm_device *drm)
 {
        struct mtk_drm_private *private = drm->dev_private;
@@ -375,12 +400,20 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
          .data = (void *)MTK_DISP_OVL },
        { .compatible = "mediatek,mt8173-disp-ovl",
          .data = (void *)MTK_DISP_OVL },
+       { .compatible = "mediatek,mt8183-disp-ovl",
+         .data = (void *)MTK_DISP_OVL },
+       { .compatible = "mediatek,mt8183-disp-ovl-2l",
+         .data = (void *)MTK_DISP_OVL_2L },
        { .compatible = "mediatek,mt2701-disp-rdma",
          .data = (void *)MTK_DISP_RDMA },
        { .compatible = "mediatek,mt8173-disp-rdma",
          .data = (void *)MTK_DISP_RDMA },
+       { .compatible = "mediatek,mt8183-disp-rdma",
+         .data = (void *)MTK_DISP_RDMA },
        { .compatible = "mediatek,mt8173-disp-wdma",
          .data = (void *)MTK_DISP_WDMA },
+       { .compatible = "mediatek,mt8183-disp-ccorr",
+         .data = (void *)MTK_DISP_CCORR },
        { .compatible = "mediatek,mt2701-disp-color",
          .data = (void *)MTK_DISP_COLOR },
        { .compatible = "mediatek,mt8173-disp-color",
@@ -389,22 +422,32 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
          .data = (void *)MTK_DISP_AAL},
        { .compatible = "mediatek,mt8173-disp-gamma",
          .data = (void *)MTK_DISP_GAMMA, },
+       { .compatible = "mediatek,mt8183-disp-gamma",
+         .data = (void *)MTK_DISP_GAMMA, },
+       { .compatible = "mediatek,mt8183-disp-dither",
+         .data = (void *)MTK_DISP_DITHER },
        { .compatible = "mediatek,mt8173-disp-ufoe",
          .data = (void *)MTK_DISP_UFOE },
        { .compatible = "mediatek,mt2701-dsi",
          .data = (void *)MTK_DSI },
        { .compatible = "mediatek,mt8173-dsi",
          .data = (void *)MTK_DSI },
+       { .compatible = "mediatek,mt8183-dsi",
+         .data = (void *)MTK_DSI },
        { .compatible = "mediatek,mt2701-dpi",
          .data = (void *)MTK_DPI },
        { .compatible = "mediatek,mt8173-dpi",
          .data = (void *)MTK_DPI },
+       { .compatible = "mediatek,mt8183-dpi",
+         .data = (void *)MTK_DPI },
        { .compatible = "mediatek,mt2701-disp-mutex",
          .data = (void *)MTK_DISP_MUTEX },
        { .compatible = "mediatek,mt2712-disp-mutex",
          .data = (void *)MTK_DISP_MUTEX },
        { .compatible = "mediatek,mt8173-disp-mutex",
          .data = (void *)MTK_DISP_MUTEX },
+       { .compatible = "mediatek,mt8183-disp-mutex",
+         .data = (void *)MTK_DISP_MUTEX },
        { .compatible = "mediatek,mt2701-disp-pwm",
          .data = (void *)MTK_DISP_BLS },
        { .compatible = "mediatek,mt8173-disp-pwm",
@@ -423,6 +466,8 @@ static const struct of_device_id mtk_drm_of_ids[] = {
          .data = &mt2712_mmsys_driver_data},
        { .compatible = "mediatek,mt8173-mmsys",
          .data = &mt8173_mmsys_driver_data},
+       { .compatible = "mediatek,mt8183-mmsys",
+         .data = &mt8183_mmsys_driver_data},
        { }
 };