arm64: dts: mt8195: Add edptx and dptx nodes
authorBo-Chen Chen <rex-bc.chen@mediatek.com>
Thu, 10 Nov 2022 06:37:14 +0000 (14:37 +0800)
committerMatthias Brugger <matthias.bgg@gmail.com>
Mon, 21 Nov 2022 12:15:00 +0000 (13:15 +0100)
In MT8195, we use edptx as the internal display interface and use
dptx as the external display interface. Therefore, we need to add
these nodes to support the internal display and the external display.

- Add dp calibration data in the efuse node.
- Add edptx and dptx nodes for MT8195.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221110063716.25677-3-rex-bc.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt8195.dtsi

index 62a1d06..5d31536 100644 (file)
                                reg = <0x193 0x1>;
                                bits = <0 4>;
                        };
+                       dp_calibration: dp-data@1ac {
+                               reg = <0x1ac 0x10>;
+                       };
                };
 
                u3phy2: t-phy@11c40000 {
                        clock-names = "engine", "pixel", "pll";
                        status = "disabled";
                };
+
+               edp_tx: edp-tx@1c500000 {
+                       compatible = "mediatek,mt8195-edp-tx";
+                       reg = <0 0x1c500000 0 0x8000>;
+                       nvmem-cells = <&dp_calibration>;
+                       nvmem-cell-names = "dp_calibration_data";
+                       power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>;
+                       interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
+                       max-linkrate-mhz = <8100>;
+                       status = "disabled";
+               };
+
+               dp_tx: dp-tx@1c600000 {
+                       compatible = "mediatek,mt8195-dp-tx";
+                       reg = <0 0x1c600000 0 0x8000>;
+                       nvmem-cells = <&dp_calibration>;
+                       nvmem-cell-names = "dp_calibration_data";
+                       power-domains = <&spm MT8195_POWER_DOMAIN_DP_TX>;
+                       interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>;
+                       max-linkrate-mhz = <8100>;
+                       status = "disabled";
+               };
        };
 };