arm64: dts: qcom: msm8998: Use the correct GPLL0_DIV leg for MMCC

MMCC has its own GPLL0 legs - one for 1-1 and one for div-2 output.
We've already been using the correct one in the non-div case, start
doing so for the other one as well.

Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-8-6222fbc2916b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 4605dd3..3f0a13b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -2724,7 +2724,8 @@
                                      "dsi1byte",
                                      "hdmipll",
                                      "dplink",
-                                     "dpvco";
+                                     "dpvco",
+                                     "gpll0_div";
                        clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
                                 <&gcc GCC_MMSS_GPLL0_CLK>,
                                 <0>,
@@ -2733,7 +2734,8 @@
                                 <0>,
                                 <0>,
                                 <0>,
-                                <0>;
+                                <0>,
+                                <&gcc GCC_MMSS_GPLL0_DIV_CLK>;
                };
 
                mmss_smmu: iommu@cd00000 {