ARM: dts: r8a7743: Add SDHI controllers
authorBiju Das <biju.das@bp.renesas.com>
Mon, 14 Aug 2017 11:49:47 +0000 (12:49 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 18 Sep 2017 06:05:22 +0000 (08:05 +0200)
Add the SDHI controllers to the r8a7743 device tree.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7743.dtsi

index 14222c7..6dd9b0b 100644 (file)
                        max-frequency = <97500000>;
                        status = "disabled";
                };
+
+               sdhi0: sd@ee100000 {
+                       compatible = "renesas,sdhi-r8a7743";
+                       reg = <0 0xee100000 0 0x328>;
+                       interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 314>;
+                       dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+                              <&dmac1 0xcd>, <&dmac1 0xce>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       max-frequency = <195000000>;
+                       power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+                       resets = <&cpg 314>;
+                       status = "disabled";
+               };
+
+               sdhi1: sd@ee140000 {
+                       compatible = "renesas,sdhi-r8a7743";
+                       reg = <0 0xee140000 0 0x100>;
+                       interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 312>;
+                       dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+                              <&dmac1 0xc1>, <&dmac1 0xc2>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       max-frequency = <97500000>;
+                       power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+                       resets = <&cpg 312>;
+                       status = "disabled";
+               };
+
+               sdhi2: sd@ee160000 {
+                       compatible = "renesas,sdhi-r8a7743";
+                       reg = <0 0xee160000 0 0x100>;
+                       interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 311>;
+                       dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+                              <&dmac1 0xd3>, <&dmac1 0xd4>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       max-frequency = <97500000>;
+                       power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+                       resets = <&cpg 311>;
+                       status = "disabled";
+               };
        };
 
        /* External root clock */